article FLL VFO.PDF

A PIC16F628 controlled “FLL” (Frequency Locked Loop) VFO for HF

Abstract

It is described a device which joins in a single microprocessor a digital programmable

frequency meter and a control logic capable to lock a manually tuned VFO to its actual frequency.

The locking function is software inhibited when a manual tuning is detected, so as to provide a

completely automatic working.

Why an “FLL” device ?

The challenge, while developing this project, was to find out a way to arrange a very stable

VFO with a very simple design, using very cheap and common components, in fact such a device

seamed to be well suited for some QRP project, direct conversion rig or other simple equipments.

So I decided not to consider a PLL or DDS approach, and the choice felt on an old, not so popular

design : the “frequency locked loop”.

The principle of operation is quite simple, a counter measures the VFO frequency, the new

reading is compared with the previously stored value and an adequate correction is applied

consequently. This process has been implemented in the past using several discrete TTL logics, now

a single microprocessor can do the job much better, moreover offering a digital readout capability.

I had already the counter software designed for a PIC16F84 device (1) , so the remaining job

was to develop an adequate code to measure the drift and control the VFO. Another problem was

how to implement the control circuit. The best way seemed to be a D/A converter, driven by the

PIC so as to produce a control voltage towards a varicap diode, but it would have required at least a

10 bit (better 12 bit) resolution, a component not so cheap nor so easy to find. So I considered to

employ a different microprocessor, the PIC16F628. This device offers a built-in PWM module

capable of delivering a 4 KHz square wave whose duty cycle may be software controlled with an

accuracy of 10 bit. It was enough to add a simple RC integrator to obtain a well filtered control

voltage, variable from 0 to 5V with a 1024 steps resolution.

Such a circuit may control the VFO frequency in a 15 KHz range with a 15 Hz unit step,

notice that a single frequency adjustment is applied only when a certain drift amount is measured

and, unlike a PLL system, there is no stability problem, no elongation or settling time, so it is

possible to obtain a quite “clear” VFO signal, with a very low noise level. Just what I was looking

for.

In short, the main performance of this device are :

•

Frequency stability aligned to the reference crystal, with a maximum +/- 15 Hz drift

•

Digital frequency readout, with programmable IF value and 10 Hz resolution on the LCD

display

•

Manual frequency tuning, trough a multi-turn potentiometer

•

Automatic Lock/Unlock function, unlock status is signalled by a LED diode and entered during

manual tuning or in case of an excessive VFO drift

•

Programmable lock range. It is the maximum allowed value for a “short term” (0.2 sec)

frequency shift without exiting the locked status. This improves the capability to suit to various

VFO circuits.

•

The overall (long term) drift compensation capability is limited to about 15 KHz (+/- 7.5 KHz),

normally enough to stabilize a well assembled VFO, however I suggest not to exceed a 20/25

MHz limit, although the counter capability may reach 35/40 MHz.

The Control Circuit schematic.

78L05

+ 12

100n

10 m

LD-

out

C2 10 m

LD+

180 – 1W

22K

18K

R6 10K

R7 10K

DB7

DB6

DB5

DB7

DB6

DB5

DB7

DB6

DB5

1 m

18K

1 m

0.47 m

220n

DB4

DB3

DB2

DB1

DB0

R/W

Vdd

Vss

DB3

DB2

DB1

DB0

R/W

Vdd

Vss

DB3

DB2

DB1

DB0

R/W

Vdd

Vss

10K

PIC16F628

C14

100n

C14

100n

R10

470

R10

470

R11

470

R11

470

R13

330

R13

330

+ 5

10 m

R12

10K

R12

10K

+ 5

R14

33K

R14

33K

2N2369

10 K

10K

Freq

SET

10 m

LD1

2N2369

C12

C10

C11

C13 22

The hearth of the circuit is the software running on a PIC16F628 microcontroller. The logic

of the locking system is quite simple : at power-on an initial 30 seconds delay is provided to allow

somewhat stabilization of the VFO. Then the actual frequency reading is stored as a reference for

the locking mechanism. The counter reading period is 200 mS and corresponds to a 5 Hz accuracy,

at every reading the new frequency is compared with the previously stored reference value and the

following actions will be taken :

•

Difference within +/- 10 Hz limits

no action will be taken, the drift is considered within lock limits

•

Difference beyond +/- 10 Hz limits, but within user defined lock range limits (20 / 100 Hz)

the compensation mechanism is activated, it will vary the PWM duty cycle by one or more steps

accordingly to the difference measured. Every correction step corresponds to a 15 Hz frequency

compensation.

• Difference beyond the user defined lock range limits (manual tuning)

the UNLOCK condition is activated, the LED is powered and the actual frequency reading

becomes the new reference value. Furthermore the PWM duty cycle is re-aligned a few steps

towards the initial (central) value, so as to improve the “long term” compensation capability.

Should the PWM duty cycle limits be exceeded (0 / 1023), a “special” condition is entered,

permanently deactivating the lock mechanism (till the next power-on). This condition is signalled

by a continuous LED lighting.

Device programming is accomplished by means of two push buttons : “SET” and “>” in the

following manner :

- Pressing the “SET” button a first time, the IF value will be displayed ("IFset" function) and the

flashing cursor is positioned on the first digit you may modify (ten MHz), now you may modify

the digit value by means of the “>” push button in the 0 - 9 range. After changing this digit you

may go to the next digit by pressing again the “SET” button, and so on until you reach the last

digit to the right.

- Another pressing of the “SET” button starts the "Mode set" function, and now you may choose,

by means of “>” button, between the three operating modes : "VFO + IF", "IF - VFO", "VFO -

IF".

- A further pushing of “SET” button enters the “Lock set” mode, allowing to modify the locking

range limits (that is the frequency drift allowed during a single reading period) between a

minimum 20 Hz value and a maximum of 100 Hz (default 25 Hz). This may be useful to allow

the control circuit compensate a short time, fast frequency drift, up to 500 Hz/sec, provided that

the overall long term drift remains within +/- 7.5 KHz. With the VFO circuit described below I

recommend to leave unchanged the 25 Hz default.

- Finally, a last “SET” button pressure closes the menu, saves the setting parameters in the PIC

EEPROM (non volatile memory), and re-activate the frequency reading function.

Keep in mind that, when operating in the "IF - VFO" or "VFO - IF" modes, the read frequency

value will be displayed only if the result of the subtraction is positive.

Control circuit components list :

R1 : 180 W - 1W

R8 : 10 K W - trimmer

C1 : 100 nF

C8 : 220 nF

U1 : PIC16F628

R2 : 22 K W

R9 : 1 K W

C2 : 10 m F

C9 : 10 m F

U2 : 78L05

R3 : 18 K W

R10 : 470 W

C3 : 1 m F

C10 : 33 pF

LD1 : LED diode

R4 : 18 K W

R11 : 470 W

C4 : 100 nF

C11 : 33pF (see text)

X1 : 4 MHz xtal

R5 : 10 K W

R12 : 10 K W

C5 : 10 m F

C12 : 22 pF

L1 : 10 m H

R6 : 10 K W

R13 : 330 W

C6 : 1 m F tantalum

C13 : 22 pF

T1 : 2N2369

R7 : 10 K W

R14 : 33K W

C7 : 0.47 m F tantalum

C14 : 100 nF

T2 : 2N2369

LCD : 1x16 LCD alphanumeric module (Optrex DMC-16117A, Hantronix HDM16116H-2, …)

The Control Circuit assembly and adjustment.

+ 12V

LED

C10

R10

R11

R12

XTAL

C11

C14

C12

R13

+ 12V

Set >

R14

C13

Vcontrol

input

C14

This circuit is assembled on a single side 68x52 mm PCB. To avoid possible interferences

with the VFO working, I recommend to make a good shielding by housing the PCB into a little

metallic enclosure. A single multi-pin connector may be employed towards LCD module, LED

diode, push buttons and power supply, while two pieces of RG174 coax cable are used for the

connection to VFO (RF input and V control).

The initial adjustment will be carried out in the following manner :

•

Remove the PIC from its socket and verify that the T1 collector voltage is in the range 1,5 to 1,7

volts, otherwise some adjustment will be required to the R12 value.

•

After inserting the PIC, turn the R8 trimmer completely toward ground side, then adjust it for

the desired LCD contrast

• If a “precision” tuning of the counter is required, you may replace C11 with a little 30 pF

capacitive trimmer. Employing an high impedance frequency meter or a digital receiver you’ll

may adjust the XTAL frequency exactly to 4.000.000 Hz.

• If necessary, set the IF value and mode by the apposite push buttons.

Now the control circuit is ready to be connected to the VFO.

The VFO schematic.

78L08

+ 12

R10

150

R10

150

R14

150

R14

150

100n

10 m

100n

Vc from

control

unit

Vc from

control

unit

47K

C15

10n

C15

10n

C16

10n

C16

10n

C11

10n

C11

10n

T2 2N2369

82K

T1 BF244

82K

C10

C12

3.3

C12

3.3

C14

220

C14

220

OUT

VFO

OUT

VFO

R12

47K

R12

47K

2N2369

R11

390

R11

390

180

56K

100K

10n

counter

56K

C17

220

C17

220

R13

390

R13

390

C13

Although any good quality VFO may be coupled to the PIC control device, I’d like to

propose a basic circuit, tested on several frequencies in conjunction with the controller.

It is a common Hartley oscillator, which employs a FET whose source is inductively

coupled to the gate by means of an intermediate tap on the resonant circuit. The coil is wound on a

T50-6 toroidal core, and must be well fixed on the PCB. Some care must also be taken in the choice

of the other components, the capacitors must be NPO type, the capacitive trimmer C8 should be

ceramic and not too small.

The frequency tuning is obtained by means of a varicap diode, in conjunction with a 2 KW

multi-turn potentiometer, so as to have a good resolution on the entire band. A second varicap is

used for the frequency compensation function, this diode must provide a 15 KHz span when varying

the control voltage from 0 to 5V.

Two outputs are provided, one for the locking system (about 200/300mV pp output) and the

other towards the connected rig (about 600/800mV pp output).

The performances I observed are quite good; testing for stability a 14 MHz unit for 30

minute I measured about –700 Hz at room temperature and -1600 Hz when heating 10 o C the

circuit. These drift values may be easily compensated by the PIC controller.

VFO components list :

R1 : 2 K W 10 turns pot

R9 : 47 K W

C3 : 100 nF

C13 : 1 pF

U1 : 78L08

R2 : 180 W

R10 : 150 W

C4 : 10 nF

C14 : 220 pF

T1 : BF244

R3 : 82 K W

R11 : 390 W

C6 : 20 pF trimmer

C15 : 10 nF

T2 : 2N2369

R4 : 56 K W

R12 : 47 K W

C7 : 10 nF

C16 : 10 nF

T3 : 2N2369

R5 : 56 K W

R13 : 390 W

C8 : 60 pF trimmer

C17 : 220 pF

R6 : 82 K W

R14 : 150 W

C10 : 10 pF

D1/D2 : BB204 double varicap

R7 : 100 K W

C1 : 100 nF

C11 : 10 nF

D3/D4 : BB204 double varicap

R8 : 150 W

C2 : 10 m F

C12 : 3.3 pF

D5 : 1N4148

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