TA1317AN.PDF

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TA1317AN
TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
T A 1 3 1 7 A N
Deflection Processor IC for TV
TA1317AN is a deflection processor IC for a large and wide
picture tube.
TA1317AN incorporates EW, vertical distortion correction
circuit and dynamic focus correction circuit. It can control various
functions via I 2 C BUS line.
Features
•
Vertical drive (AC/DC-coupling)
•
Picture height adjustment
Weight: 1.22 g (typ.)
•
Vertical shift adjustment
•
Vertical symmetry correction
•
Vertical linearity correction
•
Vertical S correction
•
Vertical integral correction
•
Vertical/Horizontal EHT compensation
•
EW drive (parabola/PWM output)
•
Picture width
•
EW trapezium correction
•
EW parabola correction
•
EW corner correction (top only/bottom only/top&bottom)
•
EW S correction
•
Center curve correction (SAW/PAR)
•
Parabola output for horizontal and vertical dynamic focus (H/V output independently)
•
Horizontal and vertical dynamic focus phase adjustment
•
Horizontal and vertical dynamic focus amplitude adjustment
•
Horizontal dynamic focus curve characteristic adjustment
•
V-ramp limiter circuit
•
Analog blanking output
000707EBA1
• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the
buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and
to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or
damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the
most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling
Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
• The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy
control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document
shall be made at the customer’s own risk.
• The products described in this document are subject to the foreign exchange and foreign trade laws.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
• The information contained herein is subject to change without notice.
2001-02-07 1/58
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TA1317AN
Block Diagram
24
23
22
21
20
19
18
17
16
15
14
13
AGC
V-RAMP
PULSE
GENE
ANALOG
BLK
CENTER
OUT
+
LVP
DETECT
V-DF
OUT
I 2 CBUS
DECODER
V
SYMMETRY
V
→
I
CENTER
PARABOLA
CENTER
SAW
V-DF
AMP
H-DF
OUT
V
→
I
V-DF
PHASE
V
LINEARITY
V-S
CORRECTION
V-
CORRECTION
∫
V
→
I
+
+
EW
TRAPEZIUM
EW-S
CORRECTION
EW
CORNER
V AMP
+
EW AMP
H-DF
PHASE
V
→
I
V EHT
V-RAMP
LIMITER
H EHT
H-DF
BATHTUB
V GUARD
DETECT
EW WIDTH
H-RAMP
DAC
V PHASE
BAND-GAP
EW PWM
1
2
3
4
5
6
7
8
9
10
11
12
2001-02-07 2/58
∫
V
→
I
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TA1317AN
Pin Functions
Pin
No.
Pin Name
Function
Interface Circuit
Input/Output Signal
7
1 V REF
Internal reference
voltage adjustment pin.
If CRT DY has
temperature coefficient,
it can be cancelled in
TV by applying inverse
temperature coefficient
to this pin. In case of
not using, connect 0.01
µ F capacitor between
this pin and GND.
1
10 k
Ω
1 k
Ω
9
7
DAC output pin.
When bus write function
VD
2 CENTER DAC
=
1, 7 bit
2
DC
DAC output.
In case of not using, it
should be open.
9
7
3 EHT IN
F
capacitor between this
pin and GND.
µ
3
DC
11 k Ω
10 k Ω
9
7
4 V DRIVE
Vertical output pin
4
100 Ω
30 k Ω
9
2001-02-07 3/58
0, 2 bit DAC
output; VD
=
EHT input pin.
In case of not using,
connect 0.01
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TA1317AN
Pin
No.
Pin Name
Function
Interface Circuit
Input/Output Signal
7
5 V-DC REF
DC reference voltage
output pin when V is DC
coupling.
In case of not using, it
should be open.
DC
5
40 k Ω
9
Vertical negative
feedback input pin.
When VD = 0, if pin is
1.2 V (typ.) or below, or
3.7 V (typ.) or higher,
returns abnormal
detection result to BUS
read function (V guard),
forcibly setting pin 20 to
High. When VD = 1, if
pin is 2.4 V (typ.) or
below, or 7.4 V (typ.) or
higher, abnormality is
detected.
7
6
12.5 k
Ω
6 V NF
50 Ω
9
7 V CC
V CC pin.
Connect 9 V (typ.).
7
8 EW PWM
EW D drive (PWM)
output pin. Open
collector output.
In case of not using, it
should be open.
8
9
9 ANALOG GND
GND pin for analog
block
7
10 EW FD
EW feedback pin
10
60 k Ω
9
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TA1317AN
Pin
No.
Pin Name
Function
Interface Circuit
Input/Output Signal
7
11 EW FILTER
Connect phase
compensation filter for
EW output. EW
parabola waveform can
be extracted from this
pin.
11
100
Ω
100
Ω
9
7
FBP input pin.
In case of not using
H-DF and EW-PWM
outputs, it should be
open.
12
500
Ω
Th: 2.25 V
12 FBP IN
Input frequency:
28 k~45 kHz
9
15
7
13 SDA
SDA pin for I 2 C bus
50 Ω
20 k Ω
S DA
Th: 2.25 V
13
ACK
15
7
14 SCL
SCL pin for I 2 C bus
20 k Ω
S CL
Th: 2.25 V
14
15
15 DIGITAL GND GND pin for digital block
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