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"Low-Noise JFET-Input Operational Amplifiers"
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996
Low Power Consumption
Low Noise
V n = 18 nV/
Wide Common-Mode and Differential
Voltage Ranges
/
Hz Typ at f = 1 kHz
High Input Impedance...JFET Input Stage
Low Input Bias and Offset Currents
Internal Frequency Compensation
Output Short-Circuit Protection
Latch-Up-Free Operation
Low Total Harmonic Distortion
0.003% Typ
High Slew Rate...13 V/
m
s Typ
Common-Mode Input Voltage Range
Includes V CC +
description
The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_
series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low
noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier
features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single
monolithic chip.
The C-suffix devices are characterized for operation from 0
°
C to 70
°
C. The I-suffix devices are characterized
for operation from – 40
°
C to 85
°
C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55
C to 125
°
C.
AVAILABLE OPTIONS
PACKAGE
T A
V IO max
AT 25
°
C
SMALL
OUTLINE
(D) †
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(N)
PLASTIC
DIP
(P)
TSSOP
PACKAGE
(PW)
FLAT
PACKAGE
(W)
10 mV
6 mV
TL071CD
TL071ACD
TL071CP
TL071ACP
TL071CPWLE
—
—
—
—
—
—
3 mV
TL071BCD
TL071BCP
—
0
C to
70
10 mV
6 mV
TL072CD
TL072CP
TL072CPWLE
0
°
TL072CD
TL072ACD
TL072CP
TL072ACP
TL072CPWLE
—
—
—
—
—
—
°
C
70
°
C
3 mV
TL072BCD
TL072BCP
—
10 mV
6 mV
TL074CD
TL074CN
TL074CPWLE
TL074CD
TL074ACD
TL074CN
TL074ACN
TL074CPWLE
—
—
—
—
—
—
3 mV
TL074BCD
TL074BCN
—
– 40
°
Cto
C to
TL071ID
TL072ID
—
TL071IP
TL072IP
6 mV
—
—
—
—
—
—
85
°
C
85
°
C
TL074ID
TL074IN
—
– 55 ° C to
125 ° C 6 mV — TL072MFK — TL072MJG — TL072MP — —
125 C 9 mV TL074MFK TL074MJ — TL074MN — TL074MW
† The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL071CDR). The PW package is only available left-ended
taped and reeled (e.g., TL072CPWLE).
6 mV
TL071MFK
—
TL071MJG
—
—
—
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright W 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1
°
10 mV
TL071CD
TL071CP
TL071CPWLE
10 mV
°
Cto
10 mV
40
°
TL071ID
TL071IP
55 ° Cto
•
104134800.011.png 104134800.012.png 104134800.013.png 104134800.014.png
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
TL071, TL071A, TL071B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
TL072, TL072A, TL072B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
TL074, TL074A, TL074B
D, J, N, OR PW PACKAGE
TL074 ...W PACKAGE
(TOP VIEW)
OFFSET N1
IN –
IN +
V CC –
1
2
3
4
8
7
6
5
NC
V CC +
OUT
OFFSET N2
1OUT
1IN –
1IN +
V CC –
1
2
3
4
8
7
6
5
V CC +
2OUT
2IN –
2IN +
1OUT
1IN –
1IN +
V CC +
2IN +
2IN –
2OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
4OUT
4IN –
4IN +
V CC –
3IN +
3IN –
3OUT
TL071
FK PACKAGE
(TOP VIEW)
TL072
FK PACKAGE
TL074
FK PACKAGE
(TOP VIEW)
(TOP VIEW)
NC
1IN –
NC
1IN +
NC
3212019
NC
2OUT
NC
2IN –
NC
1IN+
NC
V CC+
NC
2IN+
3212019
4IN+
NC
V CC –
NC
3IN+
4
5
6
7
8
18
17
16
15
14
4
5
6
7
8
18
17
16
15
14
NC
IN –
NC
IN +
NC
3212019
NC
V CC +
NC
OUT
NC
4
5
6
7
8
18
17
16
15
14
910111213
910111213
910111213
NC – No internal connection
symbols
TL071
OFFSET N1
TL072 (each amplifier)
TL074 (each amplifier)
IN +
+
IN +
+
OUT
OUT
IN –
–
IN –
–
OFFSET N2
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996
104134800.001.png 104134800.002.png
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996
schematic (each amplifier)
V CC +
IN +
IN –
64 W 128 W
OUT
64 W
C1
18 pF
1080 W
1080 W
V CC –
OFFSET
NULL
(N1)
OFFSET
NULL
(N2)
TL071 Only
All component values shown are nominal.
COMPONENT COUNT †
COMPONENT
TYPE
TL071
TL072
TL074
Resistors
11
22
44
Resistors
Transistors
11
14
22
28
44
56
JFET
2
4
6
Diodes
1
2
4
Capacitors
1
2
4
epi-FET
1
2
4
† Includes bias and trim circuitry
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
104134800.003.png
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †
Supply voltage, V CC + (see Note 1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V ID (see Note 2)
– 18 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
30 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of output short circuit (see Note 4)
±
15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
unlimited
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T A : C suffix
See Dissipation Rating Table
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0
°
C to 70
°
C
I suffix
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
– 40
°
C to 85
°
C
M suffix
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
– 55
°
C to 125
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package
– 65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J, JG, or W package
260
°
C
. . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, or PW package
300
°
C
. . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V CC+ and V CC – .
2. Differential voltages are at IN+ with respect to IN –.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and /or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
260
°
C
DISSIPATION RATING TABLE
PACKAGE
T A 3 25 ° C
POWER RATING
DERATING
FACTOR
DERATE
ABOVE T A
T A = 70 ° C
POWER RATING
T A = 85 ° C
POWER RATING
T A = 125 ° C
POWER RATING
D (8 pin)
680 mW
5.8 mW/ ° C
33 ° C
465 mW
378 mW
N/A
D (14 pin)
680 mW
7.6 mW/ ° C
60 ° C
604 mW
490 mW
N/A
FK
680 mW
11.0 mW/
°
C
88
°
C
680 mW
680 mW
273 mW
J
680 mW
11.0 mW/ ° C
88 ° C
680 mW
680 mW
273 mW
JG
680 mW
8.4 mW/
°
C
69
°
C
672 mW
546 mW
210 mW
N
680 mW
9.2 mW/ ° C
76 ° C
680 mW
597 mW
N/A
P
680 mW
8.0 mW/
°
C
65
°
C
640 mW
520 mW
N/A
PW (8 pin)
525 mW
4.2 mW/ ° C
70 ° C
525 mW
N/A
N/A
PW (14 pin)
700 mW
5.6 mW/
°
C
70
°
C
700 mW
N/A
N/A
W
680 mW
8.0 mW/ ° C
65 ° C
640 mW
520 mW
200 mW
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996
Supply voltage, V CC – (see Note 1)
Input voltage, V I (see Notes 1 and 3)
Continuous total power dissipation
Storage temperature range
104134800.004.png 104134800.005.png
electrical characteristics, V CC ±
= ± 15 V (unless otherwise noted)
TL071C
TL071AC
TL071BC
TL071I
TL071C
TL072C
TL071AC
TL072AC
TL071BC
TL072BC
TL071I
TL072I
†
‡
PARAMETER
TEST CONDITIONS †
T ‡
UNIT
PARAMETER
T A ‡
TL074C
TL074AC
TL074BC
TL074I
UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
25
°
C
3
10
3
6
2
3
3
6
V IO
Input offset voltage V O = 0,
R S = 50 W Full range
mV
V IO
mV
13
7.5
5
8
a VIO
Temperature
coefficient of input
offset voltage
V O = 0,
R S = 50
W
Full range
18
18
18
18
m
V/
°
C
25 ° C
5
100
5
100
5
100
5
100
pA
I IO
Input offset current V O = 0
I IO
Full range
10
2
2
2
nA
Input bias current § V O = 0
25 ° C
65
200
65
200
65
200
65
200
pA
I IB
Full range
7
7
7
20
nA
Common-mode
input voltage range
–12
–12
–12
–12
V ICR
in ut voltage range
25
°
C
±
11
±
11
±
11
±
11
V
ICR
15
15
15
15
Maximum eak
output voltage
R L = 10 k
W
25
°
C
±
12
±
13.5
±
12
±
13.5
±
12
±
13.5
±
12
±
13.5
V OM
R L . 10 k W
Full range
± 12
± 12
± 12
± 12
V
Full range
swing
R L
.
2 k
W
±
10
±
10
±
10
±
10
Large-signal
differential voltage
25
°
C
25
200
50
200
50
200
50
200
A VD
differential voltage
amplification
V O =
±
10 V, R L
2 k
V/mV
±
.
W Full range
V/mV
15
25
25
25
B 1
Unity-gain
bandwidth
25 ° C
3
3
3
3
MHz
r i
Input resistance
25
°
C
10 12
10 12
10 12
10 12
W
CMRR
Common-mode
V IC = V ICR min,
25
°
C
70
100
75
100
75
100
75
100
dB
CMRR
rejection ratio
V O = 0,
R S = 50 W
25
°
C
70
100
75
100
75
100
75
100
dB
k SVR
rejection ratio
( D V CC ±
V CC = ± 9 V to ± 15 V,
25
°
C
70
100
80
100
80
100
80
100
dB
k SVR
V O = 0,
R S = 50
W
25
°
C
70
100
80
100
80
100
80
100
dB
/ D V IO )
I CC
y
(each amplifier)
V O = 0,
No load
25 ° C
1.4
2.5
1.4
2.5
1.4
2.5
1.4
25 mA
mA
V O1 /V O2
Crosstalk
attenuation
A VD = 100
25 ° C
120
120
120
120
dB
† All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified.
‡ Full range is T A = 0 ° C to 70 ° C for TL07_C,TL07_AC, TL07_BC and is T A = – 40 ° C to 85 ° C for TL07_I.
§ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 4. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.
TEST CONDITIONS †
Input offset voltage V O =0
R S =50 W
Input offset current V O =0
Input bias current § V O =0
I IB
Common mode
12
to
12
to
12
to
12
to
Maximum peak
V O =
10 V R L .
2k
W
A VD
Supply-voltage
rejection ratio
V O =0
No load
14
25
14
25
14
25
14
2.5
I CC
Supply current
25 ° C
104134800.006.png 104134800.007.png 104134800.008.png 104134800.009.png 104134800.010.png

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