EMIF10-LCD02F3.pdf

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10 line EMI filter and ESD protection for LCD and cameras
10 line EMI filter and ESD protection for
LCD and cameras
efrcom
EMIF10-LCD02F3
key ic
EMIF10-LCD02F3
2610
Main product characteristics:
Where EMI filtering in ESD sensitive equipment is
required :
LCD for Mobile phones
Computers and printers
Communication systems
MCU Boards
Flip-Chip
(24 bumps)
Description
Pin Configuration (bump side)
The EMIF10-LCD02F3 is a 10 lines highly
integrated devices designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interferences. The EMIF10 flip chip packaging
means the package size is equal to the die size.
efrcom efrco m
ic
board
5
4
3
2
1
1 2
3
4
5
O1
O2
GND
I1
I2
A
A
I2
I1
GND
O2
O1
O3
O4
I3
I4
B
B
I4
I3
O4
O3
This filter includes ESD protection circuitry, which
prevents damage to the application when
subjected to ESD surges up 15kV.
O5
O6
GND
I5
I6
C
C
I6
I5
GND
O6
O5
O7
O8
GND
I7
I8
D
D
I8
I7
GND
O8
O7
Benefits
O9
O10
GND
I9
I10
E
E
I10
I9
GND
O10
O9
Lead free package
Basic Cell Configuration
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Low-pass Filter
400 µm pitch
Input
Output
Compatible with high speed data rate
Very low PCB space consuming: < 4mm 2
Very thin package: 0.60 mm
Ri/o = 70
Cline = 30pF
High efficiency in ESD suppression
GND
GND
GND
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging
Complies with the following standards:
IEC61000-4-2:
Order Code
Level 4
15 kV (air discharge)
8 kV ( contact discharge)
Part Number
Marking
EMIF10-LCD02F3
GY
on inputs and outputs
MIL STD 833E - Method 3015-6 Class 3
Rev 1
July 2005
www.st.com
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1 Electrical characteristics (T amb = 25°C)
EMIF10-LCD02F3
Table 1.
Absolute Maximum Ratings
Symbol
Parameter
Value
Unit
T j
Junction temperature
125
°C
T op
Operating temperature range
-40 to + 85
°C
T stg
Storage temperature range
-55 to +150
°C
1
Electrical characteristics (T amb = 25°C)
Symbol
Parameter
I
V BR
Breakdown voltage
I F
I RM
Leakage current @ V RM
V RM
Stand-off voltage
V F
V CL
V BR
V RM
V
V CL
Clamping voltage
I RM
I R
I PP
Peak pulse current
R I/O
Series resistance between Input & Output
I PP
C line
Input capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V BR
I R = 1 mA
6
8
10
V
I RM
V RM = 3V
50
200
nA
R I/O
Tolerance ± 20%
70
C line
Vline = 0V, V OSE = 30 mV, F =1 MHz
30
pF
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EMIF10-LCD02F3
1 Electrical characteristics (T amb = 25°C)
Figure 1. S21(dB) all lines attenuation
measurement and Aplac simulation
Figure 2. Analog cross talk measurements
0.00
dB
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
-90.00
-100.00
100.0k
1.0M
10.0M
100.0M
1.0G
f/Hz
Xtalk 1/2
Figure 3. ESD response to IEC61000-4-2
(+15kV air discharge) on one input
and on one output
Figure 4. ESD response to IEC61000-4-2
(-15kV air discharge) on one input
and on one output
Input
10V/d
Input
10V/d
Output
10V/d
Output
10V/d
100ns/d
100ns/d
Figure 5. Line capacitance versus applied
voltage
C (pF)
line
30
25
20
15
10
5
V (V)
line
0
0
1
2
3
4
5
6
3/8
0.00
dB
0.00
dB
-10.00
-10.00
-20.00
-20.00
-30.00
-30.00
-40.00
-40.00
-50.00
-50.00
-60.00
-60.00
-70.00
-70.00
-80.00
-80.00
-90.00
-90.00
-100.00
-100.00
100.0k
100.0k
1.0M
1.0M
10.0M
10.0M
100.0M
100.0M
1.0G
1.0G
f/Hz
f/Hz
Xtalk 1/2
Xtalk 1/2
356213277.003.png 356213277.004.png
2 Aplac model
EMIF10-LCD02F3
2
Aplac model
Figure 6. Device structure (one cell)
Lbump Rbump
Rline
Rbump
Lbump
O1
I1
MODEL = D1
MODEL = D2
bulk
bulk
MODEL = D3
Rbump
Rbump
Rbump
Rbump
Cbump
Cbump
Cbump
Cbump
Lbump
Lbump
Lbump
Lbump
Rgnd
Rgnd
Rgnd
Rgnd
Lgnd
Lgnd
Lgnd
Lgnd
Figure 7. Aplac model variables
aplacvar Rline 70
aplacvar C_d1 15p
aplacvar C_d2 15p
aplacvar C_d3 600p
aplacvar Ls 950pH
aplacvar Rs 150m
aplacvar Lbump 50pH
aplacvar Rbump 20m
aplacvar Cbump 150f
aplacvar Lgnd 50pH
aplacvar Rgnd 100m
aplacvar Rsub 10m
Diode D1
BV=7
IBV=1m
CJO=C_d1
M=0.28
RS=0.1
VJ=0.6
TT=100n
Diode D2
BV=7
IBV=1m
CJO=C_d2
M=0.28
RS=0.1
VJ=0.6
TT=100n
Diode D3
BV=7
IBV=1m
CJO=C_d3
M=0.28
RS=0.01
VJ=0.6
TT=100n
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EMIF10-LCD02F3
3 Ordering information scheme
3
Ordering information scheme
EMIF yy - xxx zz F3
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
3 = Lead free Pitch = 400µm, Bump = 255µm
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