27C4002.pdf

M27C4002

4 Mbit (256Kb x16) UV EPROM and OTP EPROM

5V ± 10% SUPPLY VOLTAGE in READ

OPERATION

FAST ACCESS TIME: 45ns

LOW POWER CONSUMPTION:

– Active Current 70mA at 10MHz

– Standby Current 100 m A

PROGRAMMING VOLTAGE: 12.75V

0.25V

PROGRAMMING TIME: 100 m s/byte (typical)

ELECTRONIC SIGNATURE

– Manufacturer Code: 0020h

– Device Code: 0044h

FDIP40W (F)

PDIP40 (B)

JLCC44W (J)

DESCRIPTION

The M27C4002 is a 4 Mbit EPROM offered in the

two ranges UV (ultra violet erase) and OTP (one

time programmable). It is ideally suited for micro-

processor systems requiring large programs and is

organised as 262,144 words of 16 bits.

The FDIP40W (window ceramic frit-seal package)

and the JLCC44W (J-lead chip carrier packages)

have transparent lids which allow the user to ex-

pose the chip to ultraviolet light to erase the bit

pattern. A new pattern can then be written to the

device by following the programming procedure.

For applications where the content is programmed

only one time and erasure is not required, the

M27C4002 is offered in PDIP40, PLCC44 and

TSOP40 (10 x 20 mm) packages.

PLCC44 (C)

TSOP40 (N)

10 x 20 mm

Figure 1. Logic Diagram

V CC

V PP

A0-A17

Q0-Q15

Table 1. Signal Names

A0-A17

Address Inputs

M27C4002

Q0-Q15

Data Outputs

Chip Enable

Output Enable

V PP

Program Supply

V CC

Supply Voltage

V SS

AI00727B

V SS

Ground

September 1998

1/16

M27C4002

Figure 2A. DIP Pin Connections

Figure 2B. LCC Pin Connections

V PP

V CC

A17

Q15

A16

Q14

Q13

A15

A14

Q12

A13

Q12

A13

Q11

Q10

A12

Q11

A12

A11

Q10

A11

A10

V SS

M27C4002

V SS

AI00729

AI00728

Warning: NC = Not Connected.

Figure 2C. TSOP Pin Connections

DEVICE OPERATION

The operating modes of the M27C4002 are listed

in the Operating Modes table. A single power sup-

ply is required in the read mode. All inputs are TTL

levels except for V pp and 12V on A9 for Electronic

Signature.

Read Mode

The M27C4002 has two control functions, both of

which must be logically active in order to obtain

data at the outputs. Chip Enable (E) is the power

control and should be used for device selection.

Output Enable (G) is the output control and should

be used to gate data to the output pins, inde-

pendent of device selection. Assuming that the

addresses are stable, the address access time

(t AVQV ) is equalto the delay from E to output (t ELQV ).

Data is availableat the output after a delay of t GLQV

from the falling edge of G, assuming that E has

been low and the addresses have been stable for

at least t AVQV -t GLQV .

Standby Mode

The M27C4002 has a standby mode which re-

duces the supply current from 50mA to 100

V SS

A10

A11

A12

A13

A14

A15

A16

A17

V CC

M27C4002

(Normal)

V PP

DQ0

DQ15

DQ1

DQ14

DQ2

DQ13

DQ3

DQ12

DQ4

DQ11

DQ5

DQ10

DQ9

DQ6

A. The

M27C4002 is placed in the standby mode by ap-

plying a CMOS high signal to the E input. When in

the standby mode, the outputs are in a high imped-

ance state, independent of the G input.

DQ7

DQ8

V SS

AI01831

2/16

M27C4002

Table 2. Absolute Maximum Ratings (1)

Symbol

Parameter

Value

Unit

T A

Ambient Operating Temperature (3)

–40 to 125

T BIAS

Temperature Under Bias

–50 to 125

T STG

Storage Temperature

–65 to 150

V IO (2)

Input or Output Voltages (except A9)

–2 to 7

V CC

Supply Voltage

–2 to 7

V A9 (2)

A9 Voltage

–2 to 13.5

V PP

Program Supply Voltage

–2 to 14

Notes: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings”

may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other

conditions above those indicated in the Operating sections of this specification is not i mplied. Exposure to Absolute Maximum

Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other

relevant quality documents.

2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC

voltage on Output is V CC +0.5V with possible overshoot to V CC +2V for a period less than 20ns.

3. Depends on range.

Table 3. Operating Modes

Mode

V PP

Q0 - Q15

Read

V IL

V CC or V SS

Data Out

Output Disable

V IL

V IH

V CC or V SS

Hi-Z

Program

V IL Pulse

V IH

V PP

Data In

Verify

V IH

V IL

V PP

Data Out

Program Inhibit

V IH

V PP

Hi-Z

Standby

V IH

V CC or V SS

Hi-Z

Electronic Signature

V IL

V ID

V CC

Codes

Note :X =V IH or V IL ,V ID = 12V

0.5V

Table 4. Electronic Signature

Identifier

Hex Data

Manufacturer’s Code

V IL

20h

Device Code

V IH

44h

Note: Outputs Q8-Q15 are set to ’0’.

Two Line Output Control

BecauseEPROMs are usually used in larger mem-

ory arrays, the product features a 2 line control

function which accommodates the use of multiple

memory connection. The two line control function

allows:

a. the lowest possible memory power dissipation,

b. complete assurance that output bus contention

will not occur.

For the most efficient use of thesetwo control lines,

E should be decoded and used as the primary

device selecting function, while G should be made

a common connection to all devices in the array

and connected to the READ line from the system

control bus. This ensures that all deselected mem-

ory devices are in their low power standby mode

and that the output pins are only active when data

is required from a particular memory device.

3/16

M27C4002

Table 5. AC Measurement Conditions

High Speed

Standard

Input Rise and Fall Times

10ns

20ns

Input Pulse Voltages

0 to 3V

0.4V to 2.4V

Input and Output Timing Ref. Voltages

1.5V

0.8V and 2V

Figure 3. AC Testing Input Output Waveform

Figure 4. AC Testing Load Circuit

1.3V

High Speed

1N914

1.5V

3.3k W

Standard

DEVICE

UNDER

TEST

OUT

2.4V

2.0V

C L

0.8V

0.4V

C L = 30pF for High Speed

C L = 100pF for Standard

C L includes JIG capacitance

AI01822

AI01823B

Table 6. Capacitance (1)

(T A =25

C, f = 1 MHz )

Symbol

Parameter

Test Condition

Min

Max

Unit

C IN

Input Capacitance

V IN =0V

C OUT

Output Capacitance

V OUT =0V

Note: 1. Sampled only, not 100% tested.

System Considerations

The power switching characteristics of Advanced

CMOS EPROMs require careful decoupling of the

devices. The supply current, I CC , has three seg-

ments that are of interest to the system designer:

the standby current level, the active current level,

and transient current peaks that are produced by

the falling and rising edges of E. The magnitude of

the transient current peaks is dependent on the

output capacitive and inductive loading of the de-

vice.

The associated transient voltage peaks can be

suppressed by complying with the two line output

control and by properly selected decoupling ca-

pacitors. It is recommended that a 0.1 m F ceramic

capacitor be used on every device between V CC

and V SS . This should be a high frequency capacitor

of low inherent inductance and should be placed

as close to the device as possible. In addition, a

4.7 m F bulk electrolytic capacitor should be used

between V CC and V SS for every eight devices. The

bulk capacitor should be located near the power

supply connection point.The purpose of the bulk

capacitor is to overcome the voltage drop caused

by the inductive effects of PCB traces.

4/16

M27C4002

Table 7. Read Mode DC Characteristics (1)

(T A = 0 to 70

C or –40 to 85

C; V CC =5V

5% or 5V

10%; V PP =V CC )

Symbol

Parameter

Test Condition

Min

Max

Unit

I LI

Input Leakage Current

V IN

V CC

I LO

Output Leakage Current

V OUT

V CC

E=V IL ,G=V IL ,

I OUT = 0mA, f = 10MHz

I CC

Supply Current

E=V IL ,G=V IL ,

I OUT = 0mA, f = 5MHz

I CC1

Supply Current (Standby) TTL

E = V IH

I CC2

Supply Current (Standby) CMOS

E > V CC – 0.2V

100

I PP

Program Current

V PP =V CC

V IL

Input Low Voltage

–0.3

0.8

V IH

(2)

Input High Voltage

V CC +1

V OL

Output Low Voltage

I OL = 2.1mA

0.4

V OH

Output High Voltage TTL

I OH = –400

2.4

Output High Voltage CMOS

I OH = –100

V CC – 0.7V

Notes: 1. V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP.

2. Maximum DC voltage on Output is V CC +0.5V.

Table 8A. Read Mode AC Characteristics (1)

(T A = 0 to 70

C or –40 to 85

C; V CC =5V

5% or 5V

10%; V PP =V CC )

M27C4002

Test

Condition

Symbol

Alt

Parameter

-45 (3)

-60 (3)

-80

-90

Unit

Min Max Min Max Min Max Min Max

t AVQV

t ACC

Address Valid to

Output Valid

E=V IL ,

G=V IL

t ELQV

t CE

Chip Enable Low

to Output Valid

G=V IL

t GLQV

t OE

Output Enable

Low to Output Valid

E=V IL

t EHQZ

(2)

t DF

Chip Enable High

to Output Hi-Z

G=V IL

t GHQZ (2)

t DF

Output Enable

High to Output Hi-Z

E=V IL

t AXQX

t OH

Address Transition

to Output Transition

E=V IL ,

G=V IL

Notes: 1. V CC must be applied simultaneously with or before V PP and removed simultaneously or after V PP.

2. Sampled only, not 100% tested.

3. In case of 70ns speed see High Speed AC Measurement conditions.

5/16

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