74HC_HCT243_CNV_2.pdf

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Quad bus transceiver; 3-state
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
·
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT243
Quad bus transceiver; 3-state
Product specification
File under Integrated Circuits, IC06
December 1990
21701204.006.png
Philips Semiconductors
Product specification
Quad bus transceiver; 3-state
74HC/HCT243
FEATURES
The 74HC/HCT243 are quad bus transceivers featuring
non-inverting 3-state bus compatible outputs in both send
and receive directions.
They are designed for 4-line asynchronous 2-way data
communications between data buses.
The output enable inputs (OE A and OE B ) can be used to
isolate the buses.
·
Non-inverting 3-state outputs
·
2-way asynchronous data bus communication
·
Output capability: bus driver
·
I CC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT243 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The “243” is similar to the “242” but has non-inverting (true)
outputs.
QUICK REFERENCE DATA
GND = 0 V; T amb =25 ° C; t r =t f = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
HCT
t PHL/ t PLH
propagation delay
A n to B n ;
B n to A n
C L = 15 pF; V CC = 5 V
6
11
ns
C I
input capacitance
3.5
3.5
pF
C I/O
input/output capacitance
10
10
pF
C PD
power dissipation capacitance per transceiver notes 1 and 2
26
34
pF
Notes
1. C PD is used to determine the dynamic power dissipation (P D in
m
W):
P D =C PD ´
V CC 2
´
f i + å
(C L ´
V CC 2
´
f o ) where:
´ f o ) = sum of outputs
C L = output load capacitance in pF
V CC = supply voltage in V
2. For HC the condition is V I = GND to V CC
For HCT the condition is V I = GND to V CC -
f i = input frequency in MHz
f o = output frequency in MHz
å (C L ´ V CC 2
1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information” .
December 1990
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Philips Semiconductors
Product specification
Quad bus transceiver; 3-state
74HC/HCT243
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
OE A
output enable input (active LOW)
2, 12
n.c.
not corrected
3, 4, 5, 6
A 0 to A 3
data inputs/outputs
7
GND
ground (0 V)
11, 10, 9, 8
B 0 to B 3
data inputs/outputs
13
OE B
output enable input
14
V CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
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21701204.008.png 21701204.009.png 21701204.001.png 21701204.002.png
Philips Semiconductors
Product specification
Quad bus transceiver; 3-state
74HC/HCT243
FUNCTION TABLE
INPUTS
INPUTS/OUTPUTS
OE A
OE B
A n
B n
L
H
L
H
L
L
H
H
inputs
Z
Z
A=B
B=A
Z
Z
inputs
Notes
1. H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
Fig.4 Functional diagram.
December 1990
4
21701204.003.png 21701204.004.png
Philips Semiconductors
Product specification
Quad bus transceiver; 3-state
74HC/HCT243
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” .
Output capability: bus driver
I CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t r =t f = 6 ns; C L = 50 pF
T amb (
°
C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
V CC
(V)
+
25
-
40 to
+
85
-
40 to
+
125
min. typ. max. min. max. min. max.
t PHL / t PLH propagation delay
A n to B n ;
B n to A n
22
8
6
90
18
15
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.5
t PZH / t PZL 3 -sta te output enable time
OE A to A n or B n;
OE B to A n or B n
50
18
14
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Figs 6 and 7
t PHZ / t PLZ 3 -sta te output disable time
OE A to A n or B n;
OE B to A n or B n
61
22
18
165
33
28
205
41
35
250
50
43
ns
2.0
4.5
6.0
Figs 6 and 7
t THL / t TLH output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.5
December 1990
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