74HC_HCT245_CNV_2.pdf

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Octal bus transceiver; 3-state
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
·
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
·
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT245
Octal bus transceiver; 3-state
Product specification
File under Integrated Circuits, IC06
September 1993
21701219.007.png
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
74HC/HCT245
FEATURES
GENERAL DESCRIPTIONS
·
Octal bidirectional bus interface
The 74HC/HCT245 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
·
Non-inverting 3-state outputs
·
Output capability: bus driver
·
I CC category: MSI
The 74HC/HCT245 are octal transceivers featuring
non-inverting 3-state bus compatible outputs in both send
and rec eive directions. The “245” features an output
enable (OE) input for eas y ca scading and a send/receive
(DIR) for direction control. OE controls the outputs so that
the buses are effectively isolated. The “245” is similar to
the “640” but has true (non-inverting) outputs.
QUICK REFERENCE DATA
GND = 0 V; T amb =25 ° C; t r =t f = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
HCT
t PHL / t PLH
propagation delay
A n to B n ;B n to A n
C L = 15 pF; V CC =5V
7
10
ns
C I
input capacitance
3.5
3.5
pF
C I / O
input/output capacitance
10
10
pF
C PD
power dissipation capacitance per transceiver notes 1 and 2
30
30
pF
Notes
1. C PD is used to determine the dynamic power dissipation (P D in
m
W):
P D =C PD ´
V CC 2
´
f i
(C L ´
V CC 2
´
f o ) where:
f i = input frequency in MHz
f o = output frequency in MHz
å
f o ) = sum of outputs
C L = output load capacitance in pF
V CC = supply voltage in V
2. For HC the condition is V I = GND to V CC
For HCT the condition is V I = GND to V CC -
(C L ´
V CC 2
´
1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information” .
September 1993
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Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
74HC/HCT245
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1
DIR
direction control
2, 3, 4, 5, 6, 7, 8, 9
A 0 to A 7
data inputs/outputs
10
GND
ground (0 V)
18, 17, 16, 15, 14, 13, 12, 11
B 0 to B 7
data inputs/outputs
19
OE
output enable input (active LOW)
20
V CC
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
September 1993
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Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
74HC/HCT245
FUNCTION TABLE
INPUTS
INPUTS/OUTPUTS
OE
DIR
A n
B n
L
L
H
L
H
X
A=B
inputs
Z
inputs
B=A
Z
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.4 Functional diagram.
September 1993
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21701219.004.png 21701219.005.png
Philips Semiconductors
Product specification
Octal bus transceiver; 3-state
74HC/HCT245
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” .
Output capability: bus driver
I CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t r =t f = 6 ns; C L =50pF
T amb (
°
C)
TEST CONDITIONS
74HC
SYMBOL
PARAMETER
UNIT
WAVEFORMS
V CC
(V)
+
25
-
40 to
+
85
-
40 to
+
125
min. typ. max. min. max. min. max.
t PHL / t PLH propagation delay
A n to B n;
B n to A n
25
9
7
90
18
15
115
23
20
135
27
23
ns
2.0
4.5
6.0
Fig.5
t PZH / t PZL 3 -sta te output enable time
OE to A n;
OE to B n
signalname DIR
30
11
9
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.6
t PHZ / t PLZ 3 -sta te output disable time
OE to A n;
OE to B n
signalname DIR
41
15
12
150
30
26
190
38
33
225
45
38
ns
2.0
4.5
6.0
Fig.6
t THL / t TLH output transition time
14
5
4
60
12
10
75
15
13
90
18
15
ns
2.0
4.5
6.0
Fig.5
September 1993
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