TDA8303.PDF

INTEGRATED CIRCUITS

DATA SHEET

TDA8303

TDA8303A

Small signal combination IC for

black/white TV

Preliminary speciﬁcation

File under Integrated Circuits, IC02

July 1992

Philips Semiconductors

Preliminary speciﬁcation

Small signal combination IC for black/white TV

TDA8303

TDA8303A

FEATURES

The IF amplifier is followed by a passive synchronous

demodulator providing a regenerated carrier signal. This is

limited by a logarithmic limiter circuit prior to its application

to the demodulator. The limiter has a very low differential

phase shift which results in good differential gain and

phase figures.

Video IF amplifier with synchronous demodulator

Automatic gain control (AGC) detector suitable for

negative modulation

AGC tuner

Automatic frequency control (AFC) circuit with

sample-and-hold

The video amplifier also contains a white spot inverter and

a noise clamp which limits interference pulses to a point

below the peak sync level. This circuit is more effective

than a noise inverter and results in an improved picture

stability, with respect to interference.

Video preamplifier

Sound IF amplifier and demodulator

DC volume control or separate supply for starting the

horizontal oscillator

AFC-circuit

The reference signal for the AFC circuit is obtained from

the demodulator tuned circuit. In this way only one tuned

circuit needs to be applied and only one adjustment has to

be carried out. The disadvantage with this method is that

the frequency spectrum of the signal fed to the detector is

determined by the SAW filter characteristic. This spectrum

is asymmetrical with respect to the picture carrier so that

the AFC output voltage is dependent on the video signal.

Audio preamplifier

Horizontal synchronization circuit with two control loops

Vertical synchronization (divider system) and sawtooth

generation with automatic amplitude adjustment for 50

and 60 Hz

Transmitter identification (mute)

GENERAL DESCRIPTION

To overcome this video frequency dependency of the AFC

output, the demodulator output is followed by a

sample-and-hold circuit which samples during the sync

level of the signal. This means that only the carrier signal

is available to the AFC and it will not be affected by the

video information.

At very weak input signals the drive signal of the AFC

circuit will contain substantial noise. This noise has an

asymmetrical frequency spectrum causing an offset in the

AFC output voltage. This effect can be minimized by

applying a notch in the demodulator tuned circuit. The

sample-and-hold circuit is followed by an amplifier with

high output impedance, therefore the steepness of the of

the AFC control voltage is dependent on the load

impedance.

The TDA8303/TDA8303A combines all small signal

functions (except the tuner) which are required for a

monochrome television receiver. For a complete black and

white receiver only the output stages for video, sound,

horizontal and vertical deflection and a tuner have to be

added.

The TDA8303 is for applications with npn tuners and the

TDA8303A for pnp tuners.

FUNCTIONAL DESCRIPTION

Video IF ampliﬁer, demodulator and video ampliﬁer

Each of the three AC-coupled IF stages permits the

omission of DC feedback and possesses a control range

in excess of 20 dB. An additional advantage is the

symmetry of the amplifier which results in a less critical

application.

ORDERING INFORMATION

EXTENDED TYPE

NUMBER

PACKAGE

PINS

PIN POSITION

MATERIAL

CODE

TDA8303

DIL

plastic

SOT117 (1)

TDA8303A

DIL

plastic

SOT117 (1)

Note

1. SOT117-1; 1996 December 3.

July 1992

Philips Semiconductors

Preliminary speciﬁcation

Small signal combination IC for black/white TV

TDA8303

TDA8303A

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS MIN. TYP. MAX. UNIT

Supply

V P

positive supply voltage (pin 7)

9.5

13.2

I P

supply current (pin 7)

125

160

I start

start current (pin 11)

note 1

6.5

Video

V 8-9(RMS)

IF sensitivity (RMS value)

at 38.9 MHz;

note 2

m V

G 8-9

IF gain control range

S/N

signal-to-noise ratio

input signal =

10 mV

V 18(p-p)

AFC output voltage swing

(peak-to-peak value)

10.5

11.5

Sound

V 12(RMS)

AF output signal (RMS value)

note 3

400

600

800

AMS

AM suppression

at V I = 50 mV

THD

total harmonic distortion

0.5

Sync

V 25

required sync pulse amplitude

note 4

200

I 27

required input current during ﬂyback pulse

0.1

V 22

coincidence detector output voltage

in synchronized condition

9.7

in no signal condition

1.5

V 22

vertical feedback for DC voltage

2.9

3.3

3.7

V 22(p-p)

vertical feedback for AC voltage

(peak-to-peak value)

1.2

Notes to the quick reference data

1. Pin 11 has a double function. When during switch-on a current of 9 mA is supplied to this pin, it is used to start the

horizontal oscillator. The main supply can then be obtained from the horizontal deflection stage. When no current is

supplied to this pin it can be used as a volume control.

2. On set AGC.

3. The output signal is measured at

resistor and a 470 nF capacitor in series between the video

output and pin 25. The slicing level can be varied by changing the value of this resistor (higher resistance value

results in a larger value of the minimum sync pulse amplitude). The slicing level is independent of the video

information.

July 1992

f = 7.5 kHz and maximum volume control.

4. The minimum value is obtained by connecting a 1.8 k

Philips Semiconductors

Preliminary speciﬁcation

Small signal combination IC for black/white

TDA8303

TDA8303A

July 1992

Philips Semiconductors

Preliminary speciﬁcation

Small signal combination IC for black/white

TDA8303

TDA8303A

PINNING

Sound circuit

DESCRIPTION

The sound quality of the TDA8303/TDA8303A compared

with the predecessors has been improved at weak signal

conditions. The improvement has been achieved by the

new IF amplifier which is less sensitive for radiation from

the sound IF amplifier and by change of the ground and

supply connections in the IC. When out-of-sync condition

is detected by the coincidence detector the sound output

is muted. When no mute is required the minimum voltage

level on pin 22 should be clamped to a high level of 5 V.

At this level the gating of the AGC is switched off and the

phase 1 detector has a high output current for reliable

catching of a new transmitter.

AGC take-over

vertical ramp generator

vertical drive

vertical feedback

tuner AGC

ground

supply voltage input

video IF input

IF AGC

Vertical synchronization

The TDA8303/TDA8303A embodies a synchronized

divider system for generating the vertical sawtooth at pin 2

having several advantages and features such as:

volume control/start horizontal oscillator

audio output

sound demodulator

sound IF decoupling

The vertical frequency is alignment free. The divider

automatically adapts to a vertical frequency of 50 Hz or

60 Hz including automatic amplitude correction and its

operating modes offer maximum

interference/disturbance protection.

sound IF input

ground (for some critical parts)

video ampliﬁer output

AFC output

A discriminator-window checks the accuracy of the

vertical trigger pulse. Internally clock pulses are

generated by doubling the line frequency. The divider

operates in the 60 Hz mode when the trigger pulse

appears before count 576, otherwise the 50 Hz mode

will be active.

AFC S/H, AFC switch

video demodulator tuned circuit

coincidence detector

horizontal oscillator

The divider system operates with two different reset

windows for maximum interference/disturbance

protection. The windows are activated via an up/down

counter. The counter increases its counter-value by 1 for

each time the separated vertical sync pulse appears

within the selected window, otherwise the counter value

is decreased by 1.

phase 1 detector

sync separator input

horizontal drive output

horizontal ﬂyback input

phase 2 detector

AGC circuit

The AGC circuit of the TDA8303/TDA8303A is a top-sync

detector. The video signal coming from the video amplifier

passes a 2nd order low-pass filter before it is compared

with an internal reference level. The comparator stage is

gated when the horizontal oscillator is synchronized with

the video signal, such that interference pulses outside the

gating time have no influence on the gain control.

Modes of operation

Large search window: divider ratio between 488 and 576.

This mode is valid for the following conditions:

Divider is looking for a new transmitter

Divider ratio found does not comply with the narrow

window specification limits

Up/down counter value of the divider system, operating

in the narrow window mode, drops below count 10

July 1992

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika: