TDA9103.PDF

TDA9103

DEFLECTION PROCESSOR FOR MULTISYNC MONITOR

. SELF-ADAPTIVE (EX : 30 TO 85kHz)

This IC, combined with TDA9205 (RGB preamp),

STV9420/21 or 22 (O.S.D. processor), ST7271 (micro

controller) and TDA8172 (vertical booster), allows to real-

ize very simple and high quality multimodes or multisync

monitors.

. DC ADJUSTABLE DUTY-CYCLE

. INTERNAL 1st PLL LOCK/UNLOCK IDENTIFICA-

TION

. 4 OUTPUTS FOR S-CORRECTION

. WIDE RANGE DC CONTROLLED H-POSITION

. ON/OFF SWITCH (FOR PWR MANAGEMENT)

. TWO H-DRIVE POLARITIES

VERTICAL

. VERTICAL RAMP GENERATOR

. DC CONTROLLED V-AMP, V-POS, S-AMP AND S-

CENTERING

. ON/OFF SWITCH

B+ REGULATOR

SHRINK42

(Plastic Package)

ORDER CODE : TDA9103

. INTERNAL PWM GENERATOR FOR B+ CURRENT

MODE STEP-UP CONVERTER

. DC ADJUSTABLE B+ VOLTAGE

. OUTPUT PULSES SYNCHRONISED ON HORIZON-

TAL FREQUENCY

PIN CONNECTIONS

. INTERNAL MAXIMUM CURRENT LIMITATION

EWPCC

PLL2C

H-DUTY

HFLY

HGND

HREF

PLL1F

HLOCK-CAP

FH-MIN

H-POS

XRAY-IN

HSYNC

V CC

GND

I SENSE

COMP

REGIN

B+-ADJ

KEYST

E/W-AMP

E/WOUT

PLL1INHIB

VSYNC

V-POS

V DCOUT

V-AMP

VOUT

VS-CENT

VS-AMP

VCAP

V REF

VAGCCAP

VGND

. VERTICAL PARABOLA GENERATOR WITH DC

CONTROLLED KEYSTONE AND AMPLITUDE

GENERAL

. ACCEPT POS. OR NEG. H AND V SYNC POLARI-

TIES

. SEPARATED H AND V TTL INPUT

. SAFETY BLANKING OUTPUT

DESCRIPTION

The TDA9103 is a monolithic integrated circuit assembled

in a 42 pins shrunk dual in line plastic package.

This IC controls all the functions related to the horizontal

and vertical deflection in multimodes or multisync monitors.

As can be seen in the block diagram, the TDA9103 includes

the following functions :

- Positive or Negative sync polarities,

- Auto-sync horizontal processing,

- H-PLL lock/unlock identification,

- Auto-sync Vertical processing,

- East/West signal processing block,

- B+ controller,

- Safety blanking output.

H-OUTEM

H-OUTCOL

SBLKOUT

B+OUT

May 1996

1/27

. DUAL PLL CONCEPT

HORIZONTAL

. 150kHz MAXIMUM FREQUENCY

. X-RAY PROTECTION INPUT

. 50 TO 150Hz AGC LOOP

TDA9103

PIN-OUT DESCRIPTION

Pin N

Name

Function

PLL2C

Second PLL Loop Filter

H-DUTY

DC Control of Horizontal Drive Output Pulse Duty-cycle.

If this pin is grounded, the horizontal and vertical outputs are inhibited. By connecting a

capacitor on this pin a soft-start function may be realized on h-drive output.

H-FLY

Horizontal Flyback Input (positive Polarity)

H-GND

Horizontal Section Ground. Must be connected only to components related to H blocks.

H-REF

Horizontal Section Reference Voltage. Must be filtered by capacitor to Pin 4

Hor S-CAP Switching

Horizontal Oscillator Capacitor. To be connected to Pin 4.

Horizontal Oscillator Resistor. To be connected to Pin 4.

PLL1F

First PLL Loop Filter. To be connected to Pin 4.

HLOCK-CAP

First PLL Lock/Unlock Time Constant Capacitor. Capacitor filtering the frequency change

detected on Pin13. When frequency is changing, a blanking pulse is generated on Pin 23, the

duration of this pulse is proportionnal to the capacitor on Pin 13. To be connected to Pin 4.

FH-MIN

DC Control for Free Running Frequency Setting. Comming from DAC output or DC voltage

generated by a resistor bridge connected between Pin 5 and 4.

H-POS

DC Control for Horizontal Centering

XRAY-IN

X-RAY Protection Input (with internal latch function)

H-SYNC

TTL Horizontal Sync Input

V CC

Supply Voltage (12V Typical)

GND

Ground

H-OUTEM Horizontal Drive Output (emiter of internal transistor). See description on pages 15-16.

H-OUTCOL Horizontal Drive Output (open collector of internal transistor). See description on pages 15-16.

B+ OUT

B+ PWM Regulator Output

SBLK OUT

Safety Blanking Output. Activated during frequency changes, when X-RAY input is

triggered or when VS is too low.

VGND

Vertical Section Signal Ground

VAGCCAP Memory Capacitor for Automatic Gain Control Loop in Vertical Ramp Generator

V REF

Vertical Section Reference Voltage

VCAP

Vertical Sawtooth Generator Capacitor

VS-AMP

DC Control of Vertical S Shape Amplitude

VS-CENT

DC Control of Vertical S Centering

VOUT

Vertical Ramp Output (with frequency independant amplitude and S-correction)

V-AMP

DC Control of Vertical Amplitude Adjustment

V DCOUT

Vertical Position Reference Voltage Output Temperature Matched with V-AMP Output

V-POS

DC Control of Vertical Position Adjustment

VSYNC

Vertical TTL Sync Input

PLL1INHIB TTL Input for PLL1 Output Current Inhibition (To be used in case of comp sync input signal)

E/WOUT

East/West Pincushion Correction Parabola Output

E/W-AMP

DC Control of East/West Pincushion Correction Amplitude

KEYST

DC Control of Keystone Correction

B+ ADJ

DC Control of B+ Adjustment

REGIN

Regulation Input of B+ Control Loop

COMP

B+ Error Amplifier Output for Frequency Compensation and Gain Setting

I SENSE

Sensing of External B+ Switching Transistor Emiter Current

2/27

TDA9103

BLOCK DIAGRAM

HS YNC

INPUT

INTER FACE

1st PHASE

COMP

VCO

2nd P HASE

COMP

P ULSE

S HAPE R

OUTP UT

BUFFER

FREQUENCY

S BLKOUT

LOCK

DETE CT

B+-ADJ

XRAY-IN

HREF

V REF

I S ENSE

H-VREF

HGND

BANDGAP

SAFETY

PROCESSOR

B+OUT

VREF

VGND

V-VREF

V CC

Outputs

Inhibition

COMP

REGIN

P ARABOLA

GENERATOR

E/WOUT

VSYNC

INPUT

INTER FACE

VERTICAL

OS CILLATOR

CORRECTION

TDA9103

3/27

TDA9103

QUICK REFERENCE DATA

Parameter

Value

Unit

Horizontal Frequency Range

15 to 150

kHz

Autosynch Frequency Range (for Given R0, C0)

1 to 3.7

Hor Sync Polarity Input

YES

Compatibility with Composite Sync on H-SYNC Input

YES (1)

Lock/Unlock Identification on 1st PLL

YES

DC Control for H-Position

YES

X-RAY Protection

YES

Hor DUTY Adjust

YES

Stand-by Function

YES

Hor S-CAP Switching Control

YES

Two Polarities H-Drive Outputs

YES

Supply Voltage Monitoring

YES

PLL1 Inhibition Possibility

YES

Safety Blanking Output

YES

Vertical Frequency Range

35 to 200

Vertical Autosync Range (for a Given Capacitor Value)

50 to 150

Vertical -S- Correction

YES

Vertical -C- Correction

YES

Vertical Amplitude Adjustment

YES

Vertical Position Adjustment

YES

Automatic B+ Adjustment Control Loop

YES

B+ Adjustment

YES

East/West Parabola Output

YES

PCC (Pin Cushion Correction) Amplitude Adjustment

YES

Keystone Adjustment

YES

Reference Voltage

YES (2)

Mode Detection

Dynamic Focus

Blanking Output

Notes : 1. See application diagram.

2. One for Horizontal section and one for Vertical section.

4/27

TDA9103

ABSOLUTE MAX RATING

Symbol

Parameter

Value

Unit

V CC

Supply Voltage (Pin 18)

13.5

V IN

Max Voltage on

Pins 2, 14, 15, 28, 29, 31, 33, 37, 38, 39

Pin 3

Pins 17, 34

Pin 40

Pin 42

Pin 16

1.8

5.5

VESD

ESD Succeptibility

Human Body Model, 100pF Discharge through 1.5k

300

EIAJ Norm, 200pF Discharge through 0

T stg

Storage Temperature

-40, +150

T j

Max Operating Junction Temperature

150

T oper

Operating Temperature

0, +70

THERMAL DATA

Symbol

Parameter

Value

Unit

R th (j-a)

Junction-Ambient Thermal Resistance

Max.

° C/W

HORIZONTAL SECTION

Operating conditions

Symbol

Parameter

Test conditions

Min. Typ. Max. Unit

VCO

R0min

Oscillator Resistor Min Value

Pin 11

C0min

Oscillator Capacitor Min Value

Pin 10

390

Fmax

Maximum Oscillator Frequency

150 kHz

HsVR

Horizontal Sync Input Voltage Range

Pin 17

5.5

INPUT SECTION

MinD

Minimum Input Pulses Duration

Pin 17

0.7

Mduty

Maximum Input Signal Duty Cycle

Pin 17

OUTPUT SECTION

I3m

Maximum Input Peak Current on Pin 3

IS1 to IS4 Maximum Current on S1 to S4 Outputs

Pins 6 to 9

0.5

VS1 to VS4 Maximum Voltage on S1 to S4 Outputs

Pins 6 to 9

V CC

HOI1

Horizontal Drive Output Max Current

Pin 20, sourced current

HOI2

Horizontal Drive Output Max Current

Pin 21, sunk current

DC CONTROL VOLTAGES

DCadj

DC Voltage Range on DC Controls

V REF-H = 8V, Pins 2-14-15

5/27

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika: