max100.pdf

19-0282; Rev 0; 7/94

250Msps, 8-Bit ADC with Track/Hold

_______________General Description

The MAX100 ECL-compatible, 250Msps, 8-bit analog-to-

digital converter (ADC) allows accurate digitizing of ana-

log signals from DC to 125MHz (Nyquist frequency).

Designed with Maxim’s proprietary advanced bipolar

processes, the MAX100 contains a high-performance

track/hold (T/H) amplifier and a quantizer in a single

ceramic strip-line package.

The innovative design of the internal T/H assures an

exceptionally wide input bandwidth of 1.2GHz and aper-

ture delay uncertainty of less than 2ps, resulting in a high

6.8 effective bits performance. Special comparator output

design and decoding circuitry reduce out-of-sequence

code errors. The probability of erroneous codes occurring

due to metastable states is reduced to less than 1 error

per 10 15 clock cycles. Unlike other ADCs, which can

have errors that result in false full-scale or zero-scale out-

puts, the MAX100 keeps the magnitude to less than 1LSB.

The analog input is designed for either differential or single-

ended use with a ±270mV range. Sense pins for the refer-

ence input allow full-scale calibration of the input range or

facilitate ratiometric use. Midpoint tap for the reference

string is available for applications that need to modify the

output coding for a user-defined bilinear response. Use of

separate high-current and low-current ground pins pro-

vides better noise immunity and highest device accuracy.

Dual output data paths provide several data output modes

for easy interfacing. These modes can be configured as

either one or two identical latched ECL outputs. An 8:16

demultiplexer mode that reduces the output data rates to

one-half the clock rate is also available.

For applications that require faster data rates, refer to

Maxim’s MAX101, which allows conversion rates up to

500Msps.

____________________________Features

250Msps Conversion Rate

6.8 Effective Bits at 125MHz

Less than ±1/2LSB INL

50 ½

Differential or Single-Ended Inputs

±270mV Input Signal Range

Reference Sense Inputs

Ratiometric Reference Inputs

Configurable Dual-Output Data Paths

Latched, ECL-Compatible Outputs

Low Error Rate, Less than 10 -15 Metastable States

________________________Applications

High-Speed Digital Instrumentation

High-Speed Signal Processing

Medical Systems

Radar/Sonar

High-Energy Physics

Communications

______________Ordering Information

PART

MAX100CFR* 0°C to +70°C

TEMP. RANGE

PIN-PACKAGE

84 Ceramic Flat Pack (with heatsink)

*Contact factory for 84-Pin Ceramic Flat Pack without heatsink.

_________________________________________________________Functional Diagram

VA RT VA RTS

VA CT VA CTS

VA RBS

VA RB

AIN+

FLASH CONVERTER

AData

(A0–A7)

AIN-

CLK

TRACK/

HOLD

DCLK

MODE

CONTROL

DCLK

MOD

DIV

A=B

BData

(B0–B7)

________________________________________________________________ Maxim Integrated Products 1

Call toll free 1-800-998-8800 for free literature.

250Msps, 8-Bit ADC with Track/Hold

ABSOLUTE MAXIMUM RATINGS (Note 1)

Supply Voltages

V CC .............................................................................0V to +7V

V EE ...............................................................................-7V to 0V

V CC - V EE ............................................................................+12V

Analog Input Voltage .............................................................±2V

Digital Input Voltage .................................................-2.3V to +0V

Reference Voltage (VA RT ) .....................................-0.3V to +1.5V

Reference Voltage (VA RB ).....................................-1.5V to +0.3V

Data Output Current ..........................................................-33mA

DCLK Output Current ........................................................-43mA

Operating Temperature Range...............................0°C to +70°C

Operating Junction Temperature (Note 2)............0°C to +125°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10sec) .............................+250°C

Note 1: The digital control inputs are diode protected; however, permanent damage may occur on unconnected units under high-

energy electrostatic fields. Keep unused units in conductive foam or shunt the terminals together. Discharge the conduc-

tive foam to the destination socket before insertion.

Note 2: Typical thermal resistance, junction-to-case R q JC = 5°C/W and thermal resistance, junction to ambient (MAX100CA) R q JA =

12°C/W, providing 200 lineal ft/min airflow with heatsink. See Package Information.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(V EE = -5.2V, V CC = +5V, R L = 50 ½

to -2V, VA RT = 1.02V, VA RB = -1.02V, T MIN to T MAX = 0°C to +70°C, T A = +25°C, unless

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

ACCURACY

Resolution

Bits

Integral Nonlinearity (Note 4)

INL

AData, BData

T A = +25°C

T A = T MIN to T MAX

±0.5

LSB

±0.6

AData, BData,

no missing codes

T A = +25°C

T A = T MIN to T MAX

±0.75

Differential Nonlinearity

DNL

LSB

±0.85

DYNAMIC SPECIFICATIONS

f CLK = 250MHz,

V IN = 95% full scale

(Note 5)

f AIN = 10MHz

f AIN = 50MHz

f AIN = 125MHz

7.4

Effective Bits

ENOB

7.1

Bits

6.8

Signal-to-Noise Ratio

SNR

f AIN = 50MHz, f CLK = 250MHz, V IN = 95%

full scale (Note 6)

44.5

Maximum Conversion Rate

f CLK

(Note 7)

250

Msps

Analog Input Bandwidth

BW 3dB

1.2

GHz

Aperture Width

Aperture Jitter

t AW

Figure 5

270

t AJ

Figure 5

ANALOG INPUT

Input Voltage Range

V IN

AIN+ to AIN-, Table 2,

T A = T MIN to T MAX

Full scale

Zero scale

230

315

-305

-215

Input Offset Voltage

Least-Significant-Bit Size

V IO

AIN+, AIN-, T A = T MIN to T MAX

-17

+32

LSB

T A = T MIN to T MAX

1.8

2.5

Input Resistance

R I

AIN+ and AIN- with respect to GND

Input Resistance

Temperature Coefficient

0.008

/°C

2 _______________________________________________________________________________________

otherwise noted.) (Note 3)

250Msps, 8-Bit ADC with Track/Hold

ELECTRICAL CHARACTERISTICS (continued)

(V EE = -5.2V, V CC = +5V, R L = 50

to -2V, VA RT = 1.02V, VA RB = -1.02V, T MIN to T MAX = 0°C to +70°C, T A = +25°C, unless

otherwise noted.) (Note 3)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

REFERENCE INPUT

Reference String Resistance

R REF

VA RT to VA RB

116

175

Reference String Resistance

Temperature Coefficient

0.02

/°C

LOGIC INPUTS

Digital Input Low Voltage

(Note 8)

V IL

DIV, MOD, A=B, CLK, CLK,

T A = T MIN to T MAX

-1.5

Digital Input High Voltage

(Note 8)

V IH

DIV, MOD, A=B, CLK, CLK,

T A = T MIN to T MAX

-1.07

DIV, MOD, A=B = -1.8V, T A = T MIN to T MAX

-5

Digital Input Low Current

I IL

µA

CLK, CLK, V IL = -1.8V (no termination),

T A = T MIN to T MAX

DIV, MOD, A=B = -0.8V, T A = T MIN to T MAX

-5

Digital Input High Current

I IH

µA

CLK, CLK, V IH = -0.8V (no termination),

T A = T MIN to T MAX

LOGIC OUTPUTS (Note 9)

AData, BData ,

DCLK, DCLK

T A = +25°C

T A = T MIN to T MAX

-1.95

-1.60

Digital Output Low Voltage

V OL

-1.95

-1.50

Digital Output High Voltage

V OH

AData, BData ,

DCLK, DCLK

T A = +25°C

T A = T MIN to T MAX

-1.02

-0.70

-1.10

-0.70

POWER REQUIREMENTS

T A = +25°C

T A = T MIN to T MAX

464

670

Positive Supply Current

I CC

V CC = 5.0V

710

Negative Supply Current

I EE

V EE = -5.2V

T A = +25°C

-750

-560

T A = T MIN to T MAX

-780

Common-Mode Rejection Ratio

CMRR

V INCM = ±0.5V

T A = T MIN to T MAX

Power-Supply Rejection Ratio

PSRR

T A = T MIN to T MAX

V CC (nom) = ±0.25V

V EE (nom) = ±0.25V

_______________________________________________________________________________________ 3

250Msps, 8-Bit ADC with Track/Hold

TIMING CHARACTERISTICS

(V EE = -5.2V, V CC = +5V, R L = 50

to -2V, VA RT = 1.02V, VA RB = -1.02V, T A = +25°C, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Clock Pulse Width Low

Clock Pulse Width High

t PWL

CLK, CLK , Figures 1 and 2

1.9

5.0

t PWH

CLK, CLK, Figures 1 and 2

1.9

CLK to DCLK

Propagation Delay

t PD1

DIV = 0, Figure 1

DIV = 1, Figure 2

0.8

2.4

1.9

5.7

DCLK to A/BData

Propagation Delay

t PD2

DIV = 0, Figure 1

DIV = 1, Figure 2

0.5

2.2

-1.4

-0.1

Rise Time

t R

20% to 80%

DCLK

DATA

DCLK

DATA

500

700

600

Fall Time

t F

20% to 80%

550

See Figures 3 and 4

and Table 1 (delay

depends on output

mode)

Divide-by-1 mode

7 1/2

Pipeline Delay

(Latency)

Clock

Cycles

t NPD

Divide-by-

2 mode

AData

7 1/2

BData

8 1/2

Note 3: All devices are 100% production tested at +25°C and are guaranteed by design for T A = T MIN to T MAX as specified.

Note 4: Deviation from best-fit straight line. See Integral Nonlinearitysection.

Note 5: See the Signal-to-Noise Ratio and Effective Bitssection in the Definitions of Specifications.

Note 6: SNR calculated from effective bits performance using the following equation: SNR (dB) = 1.76 + (6.02) (effective bits).

Note 7: Clock pulse width minimum requirements t PWL and t PWH must be observed to achieve stated performance.

Note 8: Functionality guaranteed for -1.07 ²

V IH ²

-0.7 and -2.0 ²

V IL ²

-1.5.

Note 9: Outputs terminated through 50

to -2.0V.

__________________________________________Typical Operating Characteristics

(T A = +25°C, unless otherwise noted.)

INTEGRAL NONLINEARITY

vs. OUTPUT CODE

DIFFERENTIAL NONLINEARITY

vs. OUTPUT CODE

0.75

0.50

0.75

0.50

0.25

-0.25

-0.50

-0.75

-0.50

-0.75

128

192

256

128

192

256

OUTPUT CODE

4 _______________________________________________________________________________________

250Msps, 8-Bit ADC with Track/Hold

____________________________Typical Operating Characteristics (continued)

(T A = +25°C, unless otherwise noted.)

FFT PLOT (f AIN = 120.4462MHz)

FFT PLOT (f AIN = 10.4462MHz)

-10

-20

-30

-40

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100

-50

-60

-70

-80

-90

-100

0 12.5 25 37.5 50 62.5 75 87.5 100 112.5 125

12.5

37.5

62.5

FREQUENCY (MHz)

f CLK = 250MHz, f AIN = 120.4462MHz

SER = -42.3dB, NOISE FLOOR = -65.4dB

f CLK = 250MHz, f AIN = 10.4462MHz

SER = -45.87dB, NOISE FLOOR = -68.5dB

EFFECTIVE BITS

vs. ANALOG INPUT FREQUENCY

EFFECTIVE BITS

vs. CLOCK FREQUENCY

f CLK = 250MHz,

V IN = 95% FS

f AIN = 10.4MHz,

V IN = 95% FS

100

150 200

250 300

100 150

200

250

300

f AIN (MHz)

f CLK (MHz)

EFFECTIVE BITS

vs. ANALOG INPUT FREQUENCY

EFFECTIVE BITS

vs. ANALOG INPUT FREQUENCY

T CASE = +80°C,

f CLK = 250MHz,

V IN = 95% FS

T CASE = -15°C,

f CLK = 250MHz

V IN = 95% FS

100

150

200

250

100

150

200

250

f AIN (MHz)

_______________________________________________________________________________________ 5

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