BUK7505-30A_2.pdf

(50 KB) Pobierz
I:\\PML\\DATA\\MOSLV\\TRENCH\\GENRTN2\\7505-30A.PRD
Philips Semiconductors
Product specification
TrenchMOS
Ô
transistor
BUK7505-30A
Standard level FET
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode
SYMBOL PARAMETER
MAX.
UNIT
standard level field-effect power
transistor in a plastic envelope using
V DS
Drain-source voltage
30
V
’ trench ’ technology which features
I D
Drain current (DC)
75
A
very low on-state resistance. It is
P tot
Total power dissipation
230
W
intended for use in automotive and
T j
Junction temperature
175
˚C
general
purpose
switching
R DS(ON)
Drain-source on-state
5
m
W
applications.
resistance
V GS = 10 V
PINNING - TO220AB
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
d
tab
1
gate
2
drain
3
source
g
tab drain
123
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
V DS
Drain-source voltage
-
-
30
V
V DGR
Drain-gate voltage
R GS = 20 k
W
-
30
V
±
V GS
Gate-source voltage
-
-
20
V
I D
Drain current (DC)
T mb = 25 ˚C
-
75
A
I D
Drain current (DC)
T mb = 100 ˚C
-
75
A
I DM
Drain current (pulse peak value)
T mb = 25 ˚C
-
400
A
P tot
Total power dissipation
T mb = 25 ˚C
-
230
W
T stg , T j
Storage & operating temperature
-
- 55
175
˚C
THERMAL RESISTANCES
SYMBOL PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R th j-mb
Thermal resistance junction to
-
-
0.65
K/W
mounting base
R th j-a
Thermal resistance junction to
Minimum footprint, FR4
50
-
K/W
ambient
board
September 1999
1
Rev 1.100
22889557.003.png
Philips Semiconductors
Product specification
TrenchMOS
Ô
transistor
BUK7505-30A
Standard level FET
STATIC CHARACTERISTICS
T j = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
V (BR)DSS
Drain-source breakdown
V GS = 0 V; I D = 0.25 mA;
30
-
-
V
voltage
T j = -55˚C
27
-
-
V
V GS(TO)
Gate threshold voltage
V DS = V GS ; I D = 1 mA
2
3.0
4.0
V
T j = 175˚C
1
-
-
V
T j = -55˚C
-
-
4.4
V
I DSS
Zero gate voltage drain current V DS = 30 V; V GS = 0 V;
-
0.05
10
m
A
T j = 175˚C
-
-
500
m
A
I GSS
Gate source leakage current
V GS =
±
20 V; V DS = 0 V
-
2
100
nA
R DS(ON)
Drain-source on-state
V GS = 10 V; I D = 25 A
-
4.3
5
m
W
resistance
T j = 175˚C
-
-
9.3
m
W
DYNAMIC CHARACTERISTICS
T mb = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
C iss
Input capacitance
V GS = 0 V; V DS = 25 V; f = 1 MHz
-
4500 6000
pF
C oss
Output capacitance
-
1500 1800
pF
C rss
Feedback capacitance
-
960 1300
pF
t d on
Turn-on delay time
V DD = 30 V; R load =1.2
W
;
-
35
55
ns
t r
Turn-on rise time
V GS = 10 V; R G = 10
W
-
130
200
ns
t d off
Turn-off delay time
-
155
230
ns
t f
Turn-off fall time
-
150
220
ns
L d
Internal drain inductance
Measured from contact screw on
-
3.5
-
nH
tab to centre of die
L d
Internal drain inductance
Measured from drain lead 6 mm
-
4.5
-
nH
from package to centre of die
L s
Internal source inductance
Measured from source lead 6 mm
-
7.5
-
nH
from package to source bond pad
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T j = 25˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
I DR
Continuous reverse drain
-
-
75
A
current
I DRM
Pulsed reverse drain current
-
-
240
A
V SD
Diode forward voltage
I F = 25 A; V GS = 0 V
-
0.85
1.2
V
I F = 75 A; V GS = 0 V
-
1.1
-
V
t rr
Reverse recovery time
I F = 75 A; -dI F /dt = 100 A/
m
s;
-
400
-
ns
Q rr
Reverse recovery charge
V GS = -10 V; V R = 30 V
-
1.0
-
m
C
September 1999
2
Rev 1.100
22889557.004.png
Philips Semiconductors
Product specification
TrenchMOS
Ô
transistor
BUK7505-30A
Standard level FET
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
W DSS
Drain-source non-repetitive
I D = 75 A; V DD
£
25 V;
-
-
500
mJ
unclamped inductive turn-off
V GS = 10 V; R GS = 50
W
; T mb = 25 ˚C
energy
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
1000
100
10
0
20 40 60 80 100 120 140 160 180
Tmb / C
1
1
10
100
Fig.1. Normalised power dissipation.
PD% = 100
×
P D /P D 25 ˚C = f(T mb )
Fig.3. Safe operating area. T mb = 25 ˚C
I D & I DM = f(V DS ); I DM single pulse; parameter t p
120
110
100
90
80
70
60
50
40
30
20
10
0
ID%
Normalised Current Derating
1
Zth / (K/W)
D =
0.5
0.1
0.2
0.1
0.05
0.02
P
t p
D =
t p
D
T
0.01
T
t
0
0
20 40 60 80 100 120 140 160 180
Tmb / C
0.001
0.00001
0.001
t/S
0.1
10
Fig.2. Normalised continuous drain current.
ID% = 100
I D /I D 25 ˚C = f(T mb ); conditions: V GS
³
5 V
Fig.4. Transient thermal impedance.
Z th j-mb = f(t); parameter D = t p /T
September 1999
3
Rev 1.100
×
22889557.005.png
Philips Semiconductors
Product specification
TrenchMOS
Ô
transistor
BUK7505-30A
Standard level FET
400
ID/A
20.0
14.0
12.0
10.0
100
9.5
VGS/V =
ID/A
9.0
8.5
80
300
8.0
7.5
60
200
7.0
40
6.5
Tj/C = 175
25
100
6.0
20
5.5
5.0
0
4.5
0
0
1
2
3
4
5
6
7
0
2
4
VDS/V
6
8
10
VGS/V
Fig.5. Typical output characteristics, T j = 25 ˚C.
I D = f(V DS ); parameter V GS
Fig.8. Typical transfer characteristics.
I D = f(V GS ) ; conditions: V DS = 25 V; parameter T j
11 RDS(ON)/mOhm
90
gfs/S
VGS/V =
80
10
9
70
60
8
50
7
5.5
6.0
6.5
7.0
8.0
10.0
40
6
30
5
20
4
10
3
0
0
20
40
ID/A
60
80
100
0
20
40
ID/A
60
80
100
Fig.6. Typical on-state resistance, T j = 25 ˚C.
R DS(ON) = f(I D ); parameter V GS
Fig.9. Typical transconductance, T j = 25 ˚C.
g fs = f(I D ); conditions: V DS = 25 V
7.5 RDS(ON)/mOhm
2
a
30V TrenchMOS
7
6.5
1.5
6
5.5
1
5
4.5
0.5
4
3.5
-100
0
100
200
3
-50
50
150
5
10
VGS/V
15
20
Tj / C
Fig.7. Typical on-state resistance, T j = 25 ˚C.
R DS(ON) = f(V GS ); conditions I D = 25 A;
Fig.10. Normalised drain-source on-state resistance.
a = R DS(ON) /R DS(ON)25 ˚C = f(T j ); I D = 25 A; V GS = 5 V
September 1999
4
Rev 1.100
0
22889557.006.png 22889557.001.png
Philips Semiconductors
Product specification
TrenchMOS
Ô
transistor
BUK7505-30A
Standard level FET
5
VGS(TO) / V
BUK759-60
12
VGS/V
max.
10
4
typ.
8
3
VDS =
14V
24V
6
min.
2
4
1
2
-100
-50
0
50
100
150
200
0
0
20
40
60
80
100
120
140
Tj / C
QG/nC
Fig.11. Gate threshold voltage.
V GS(TO) = f(T j ); conditions: I D = 1 mA; V DS = V GS
Fig.14. Typical turn-on gate-charge characteristics.
V GS = f(Q G ); conditions: I D = 50 A; parameter V DS
1E-01
Sub-Threshold Conduction
100
ID/A
80
1E-02
2%
typ
98%
60
1E-03
Tj/C =
175
25
1E-04
40
20
1E-05
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
1E-06
0
1
2
3
4
5
VSDS/V
Fig.12. Sub-threshold drain current.
I D = f(V GS) ; conditions: T j = 25 ˚C; V DS = V GS
Fig.15. Typical reverse diode current.
I F = f(V SDS ); conditions: V GS = 0 V; parameter T j
10
WDSS%
120
110
100
90
80
70
60
50
40
30
20
10
0
9
8
7
6
5
4
Ciss
3
2
1
Coss
Crss
0
20
40
60
80
100 120 140 160 180
Tmb / C
0.01
0.1
1
10
100
VDS/V
Fig.13. Typical capacitances, C iss , C oss , C rss .
C = f(V DS ); conditions: V GS = 0 V; f = 1 MHz
Fig.16. Normalised avalanche energy rating.
W DSS % = f(T mb ); conditions: I D = 75 A
September 1999
5
Rev 1.100
0
22889557.002.png

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin