SI4835DY.pdf

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323067144 UNPDF
January 2001
Si4835DY
P-Channel Logic Level PowerTrench
MOSFET
General Description
This P-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor's advanced PowerTrench process
that has been especially tailored to minimize on-state
resistance and yet maintain superior switching
performance.
Features
• -8.8 A, -30 V. R DS(ON) = 0.020
@ V GS = -10 V
R DS(ON) = 0.035
@ V GS = -4.5 V
25V) for battery applications.
• Low gate charge (19nC typical).
• Fast switching speed.
• High performance trench technology for extremely
low R DS(ON) .
• High power and current handling capability.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and
fast switching are required.
Applications
• Battery protection
• Load switch
• Motor drives
D
D
5
4
D
D
6
3
7
2
G
S
8
1
S
SO-8
S
Absolut e Maximum Ratings T A = 25°C unless otherwise noted
Symbol
Parameter
Ratings
Units
V DSS
Drain-Source Voltage
-30
V
V GSS
Gate-Source Voltage
25
V
I D
Drain Current - Continuous
(Note 1a)
-8.8
A
- Pulsed
-50
P D
Power Dissipation for Single Operation
(Note 1a)
2.5
W
(Note 1b)
1.2
(Note 1c)
1
T J , T stg
Operating and Storage Junction Temperature Range
-55 to +150
C
Therma l Characteristics
R θ
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
50
C/W
R θ
JC
Thermal Resistance, Junction-to-Case
(Note 1)
25
C/W
Package Outlines and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
Si4835DY
4835
13’’
12mm
2500 units
2001 Fairchild Semiconductor International
Si4835DY Rev. A
• Extended V GSS range (
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Electrical Characteristics T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV DSS
Drain-Source Breakdown Voltage
V GS = 0 V, I D = -250
A
-30
V
BV DSS
Breakdown Voltage Temperature
Coefficient
I D = -250
A,Referenced to 25
C
-24
mV/
C
T J
I DSS
Zero Gate Voltage Drain Current
V DS = -24 V, V GS = 0 V
-1
A
I GSSF
Gate-Body Leakage Current, Forward V GS = 25 V, V DS = 0 V
100
nA
I GSSR
Gate-Body Leakage Current, Reverse V GS = -25 V, V DS = 0 V
-100
nA
On Characteristics (Note 2)
V GS(th)
Gate Threshold Voltage
V DS = V GS , I D = -250
A
-1
-2
-3
V
V GS(th)
Gate Threshold Voltage
Temperature Coefficient
I D = -250
A,Referenced to 25
C
5
mV/
C
T J
R DS(on)
Static Drain-Source
On-Resistance
V GS = -10 V, I D = -8.8 A
V GS = -10 V, I D = -8.8 A,T J =125
0.015
0.023
0.026
0.020
0.032
0.035
C
V GS = -4.5 V, I D = -6.7 A
I D(on)
On-State Drain Current
V GS = -10 V, V DS = -5 V
-25
A
g FS
Forward Transconductance
V DS = -10 V, I D = -8.8 A
20
S
Dynamic Characteristics
C iss
Input Capacitance
V DS = -15 V, V GS = 0 V,
f = 1.0 MHz
1680
pF
C oss
Output Capacitance
545
pF
C rss
Reverse Transfer Capacitance
220
pF
Switching Characteristics (Note 2)
t d(on)
Turn-On Delay Time
V DD = -15 V, I D = -1 A,
V GS = -10 V, R GEN = 6
12
22
ns
t r
Turn-On Rise Time
15
27
ns
t d(off)
Turn-Off Delay Time
55
90
ns
t f
Turn-Off Fall Time
23
37
ns
Q g
Total Gate Charge
V DS = -10 V, I D = -8.8 A,
V GS = -5 V,
19
27
nC
Q gs
Gate-Source Charge
6.8
nC
Q gd
Gate-Drain Charge
7.2
nC
Drain-Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain-Source Diode Forward Current
-2.1
A
V SD
Drain-Source Diode Forward Voltage
V GS = 0 V, I S = -2.1 A (Note 2)
-0.52 -1.2
V
JA is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
JC is guaranteed by design while R
JA is determined by the user's board design.
a) 50
C/W when
mounted on a 1 in 2
pad of 2 oz. copper.
C/W when
mounted on a 0.04 in 2
pad of 2 oz. copper.
c) 125
C/W on a minimum
mounting pad of 2 oz. copper.
Scale 1 : 1 on letter size paper
2: Pulse Test: Pulse Width
300
s, Duty Cycle
2.0%
Si4835Dy Rev. A
Notes:
1: R
θ
b) 105
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Typical Characteristics
50
2.6
V GS = -10V
-6.0V
-5.0V
2.4
40
-7.0V
2.2
V GS = -4.0V
-4.5V
2
30
1.8
-4.5V
-4.0V
1.6
-5.0V
20
1.4
-6.0V
10
-3.5V
1.2
-7.0V
-8.0V
1
-10V
0
0.8
0
1
2
3
4
5
0
10
20
30
40
50
-V DS , DRAIN-SOURCE VOLTAGE (V)
-I D , DIRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage
1.6
0.06
I D = -8.8A
V GS = -10V
I D = -4.4A
0.05
1.4
0.04
1.2
0.03
1
T A = 125 o C
0.02
T A = 25 o C
0.8
0.01
0.6
0
-50
-25
0
25
50
75
100
125
150
3
4
5
6
7
8
9
10
T J , JUNCTION TEMPERATURE ( o C)
-V GS , GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
with Temperature
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage
50
100
V DS = -5V
T A = -55 o C
25 o C
125 o C
V GS = 0V
10
40
1
T A = 125 o C
30
25 o C
0.1
20
-55 o C
0.01
10
0.001
0
0.0001
1
2
3
4
5
6
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V GS , GATE TO SOURCE VOLTAGE (V)
-V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Si4835DY Rev. A
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Typical Characteristics (continued)
10
2500
I D = -8.8A
f = 1 MHz
V GS = 0 V
V DS = -5V
-10V
8
2000
-15V
C ISS
6
1500
4
1000
2
500
C OSS
C RSS
0
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
Q g , GATE CHARGE (nC)
-V DS , DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate-Charge Characteristics
Figure 8. Capacitance Characteristics
100
50
R DS(ON) LIMIT
SINGLE PULSE
R
100
s
JA = 125 o C/W
T A = 25 o C
1ms
40
10
10ms
100ms
30
1s
1
10s
DC
20
0.1
V GS = -10V
SINGLE PULSE
R
10
0.01
0
0.1
1
10
100
0.001
0.01
0.1
1
10
100
1000
-V DS , DRAIN-SOURCE VOLTAGE (V)
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
1
0.5
D = 0. 5
0.2
R (t) = r(t) * R
R = 125°C /W θ
JA
θ
JA
0.2
JA
0.1
0. 1
0.05
0.02
0. 0 1
0.05
P(pk )
0.02
t 1
t
2
0.01
S i n g le P u l s e
T - T = P * R ()
θ
JA
J
A
0.005
D u t y C y c l e, D = t /t
1 2
0.002
0.0001
0.001
0.01
0.1
1
10
100
300
t , TIME (se c)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient themal response will change depending on the circuit board design.
Si4835DY Rev. A
JA = 125 o C/W
T A = 25 o C
0.001
1
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT ™
DOME™
E 2 CMOS TM
EnSigna TM
FACT™
FACT Quiet Series™
FAST
FASTr™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. G
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