LM2900_LM3900_LM3301.pdf

(323 KB) Pobierz
LM2900/LM3900/LM3301 Quad Amplifiers
February 1995
LM2900/LM3900/LM3301 Quad Amplifiers
General Description
The LM2900 series consists of four independent, dual input,
internally compensated amplifiers which were designed
specifically to operate off of a single power supply voltage
and to provide a large output voltage swing. These amplifi-
ers make use of a current mirror to achieve the non-invert-
ing input function. Application areas include: ac amplifiers,
RC active filters, low frequency triangle, squarewave and
pulse waveform generation circuits, tachometers and low
speed, high voltage digital logic gates.
Features
Y Wide single supply voltage 4 V DC to 32 V DC
Range or dual supplies g 2V DC to g 16 V DC
Y Supply current drain independent of supply voltage
Y Low input biasing current 30 nA
Y High open-loop gain 70 dB
Y Wide bandwidth 2.5 MHz (unity gain)
Y Large output voltage swing (V a b 1) Vp-p
Y Internally frequency compensated for unity gain
Y Output short-circuit protection
Schematic and Connection Diagrams
Dual-In-Line and S.O.
TL/H/7936±2
Top View
TL/H/7936±1
Order Number LM2900N, LM3900M, LM3900N or LM3301N
See NS Package Number M14A or N14A
C 1995 National Semiconductor Corporation
TL/H/7936
RRD-B30M115/Printed in U. S. A.
383662074.004.png
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
LM2900/LM3900
LM3301
Supply Voltage
32 V DC
28 V DC
g 16 V DC
g 14 V DC
Power Dissipation (T A e 25 § C) (Note 1)
Molded DIP
1080 mW
1080 mW
S.O. Package
765 mW
Input Currents, I IN a or I IN b
20 mA DC
20 mA DC
Output Short-Circuit DurationÐOne Amplifier
Continuous
Continuous
T A e 25 § C (See Application Hints)
Operating Temperature Range
b 40 § Cto a 85 § C
LM2900
b 40 § Cto a 85 § C
LM3900
0 § Cto a 70 § C
Storage Temperature Range
b 65 § Cto a 150 § C
b 65 § Cto a 150 § C
Lead Temperature (Soldering, 10 sec.)
260 § C
260 § C
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
260 § C
260 § C
Small Outline Package
Vapor Phase (60 sec.) 215 § C 215 § C
Infrared (15 sec.) 220 § C 220 § C
See AN-450 ``Surface Mounting Methods and Their Effect on Product Reliability'' for other methods of soldering surface mount
devices.
ESD tolerance (Note 7)
2000V
2000V
Electrical Characteristics T A e 25 § C, V a e 15 V DC , unless otherwise stated
LM2900
LM3900
LM3301
Parameter
Conditions
Units
Min Typ Max Min Typ Max Min Typ Max
Open Voltage Gain Over Temp.
V/mV
Loop
Voltage Gain
D V O e 10 V DC
1.2 2.8
1.2 2.8
1.2 2.8
Inverting Input
Input Resistance
1
1
1
M X
Output Resistance
8
8
9
k X
Unity Gain Bandwidth
Inverting Input
2.5
2.5
2.5
MHz
Input Bias Current
Inverting Input, V a e 5V DC
30 200
30 200
30 300
nA
Inverting Input
Slew Rate
Positive Output Swing
0.5
0.5
0.5
V/ m s
Negative Output Swing
20
20
20
Supply Current
R L e % On All Amplifiers
6.2 10
6.2 10
6.2 10 mA DC
Output V OUT High
R L e 2k,
I IN b e 0,
13.5
13.5
13.5
V a e 15.0 V DC I IN a e 0
Voltage
Swing
V OUT Low
I IN b e 10 m A,
0.09 0.2
0.09 0.2
0.09 0.2
I IN a e 0
V DC
V OUT High
V a e Absolute I IN b e 0,
Maximum Ratings I IN a e 0
29.5
29.5
26.0
R L e % ,
Output Source
6 18
6 10
5 18
Current
Sink
(Note 2)
0.5 1.3
0.5 1.3
0.5 1.3 mA DC
Capability
I SINK
V OL e 1V, I IN b e 5 m A
5
5
5
2
383662074.005.png
Electrical Characteristics (Note 6), V a e 15 V DC , unless otherwise stated (Continued)
LM2900
LM3900
LM3301
Parameter
Conditions
Units
Min Typ Max Min Typ Max Min Typ Max
Power Supply Rejection T A e 25 § C, f e 100 Hz
70
70
70
dB
Mirror Gain
@ 20 m A (Note 3)
0.90 1.0 1.1 0.90 1.0 1.1 0.90 1 1.10
m A/ m A
@ 200 m A (Note 3) 0.90 1.0 1.1 0.90 1.0 1.1 0.90 1 1.10
D Mirror Gain @ 20 m Ato200 m A (Note 3) 2 5 2 5 2 5 %
Mirror Current (Note 4) 10 500 10 500 10 500 m A DC
Negative Input Current T A e 25 § C (Note 5) 1.0 1.0 1.0 mA DC
Input Bias Current Inverting Input 300 300 nA
Note 1: For operating at high temperatures, the device must be derated based on a 125 § C maximum junction temperature and a thermal resistance of 92 § C/W
which applies for the device soldered in a printed circuit board, operating in a still air ambient. Thermal resistance for the S.O. package is 131 § C/W.
Note 2: The output current sink capability can be increased for large signal conditions by overdriving the inverting input. This is shown in the section on Typical
Characteristics.
Note 3: This spec indicates the current gain of the current mirror which is used as the non-inverting input.
Note 4: Input V BE match between the non-inverting and the inverting inputs occurs for a mirror current (non-inverting input current) of approximately 10 m A. This is
therefore a typical design center for many of the application circuits.
Note 5: Clamp transistors are included on the IC to prevent the input voltages from swinging below ground more than approximately b 0.3 V DC . The negative input
currents which may result from large signal overdrive with capacitance input coupling need to be externally limited to values of approximately 1 mA. Negative input
currents in excess of 4 mA will cause the output voltage to drop to a low voltage. This maximum current applies to any one of the input terminals. If more than one
of the input terminals are simultaneously driven negative smaller maximum currents are allowed. Common-mode current biasing can be used to prevent negative
input voltages; see for example, the ``Differentiator Circuit'' in the applications section.
Note 6: These specs apply for b 40 § C s T A s a 85 § C, unless otherwise stated.
Note 7: Human body model, 1.5 k X in series with 100 pF.
Application Hints
When driving either input from a low-impedance source, a
limiting resistor should be placed in series with the input
lead to limit the peak input current. Currents as large as
20 mA will not damage the device, but the current mirror on
the non-inverting input will saturate and cause a loss of mir-
ror gain at mA current levelsÐespecially at high operating
temperatures.
Precautions should be taken to insure that the power supply
for the integrated circuit never becomes reversed in polarity
or that the unit is not inadvertently installed backwards in a
test socket as an unlimited current surge through the result-
ing forward diode within the IC could cause fusing of the
internal conductors and result in a destroyed unit.
Output short circuits either to ground or to the positive pow-
er supply should be of short time duration. Units can be
destroyed, not as a result of the short circuit current causing
metal fusing, but rather due to the large increase in IC chip
dissipation which will cause eventual failure due to exces-
sive junction temperatures. For example, when operating
from a well-regulated a 5V DC power supply at T A e 25 § C
with a 100 k X shunt-feedback resistor (from the output to
the inverting input) a short directly to the power supply will
not cause catastrophic failure but the current magnitude will
be approximately 50 mA and the junction temperature will
be above T J max. Larger feedback resistors will reduce the
current, 11 M X provides approximately 30 mA, an open cir-
cuit provides 1.3 mA, and a direct connection from the out-
put to the non-inverting input will result in catastrophic fail-
ure when the output is shorted to V a as this then places the
base-emitter junction of the input transistor directly across
the power supply. Short-circuits to ground will have magni-
tudes of approximately 30 mA and will not cause cata-
strophic failure at T A e 25 § C.
Unintentional signal coupling from the output to the non-in-
verting input can cause oscillations. This is likely only in
breadboard hook-ups with long component leads and can
be prevented by a more careful lead dress or by locating the
non-inverting input biasing resistor close to the IC. A quick
check of this condition is to bypass the non-inverting input
to ground with a capacitor. High impedance biasing resis-
tors used in the non-inverting input circuit make this input
lead highly susceptible to unintentional AC signal pickup.
Operation of this amplifier can be best understood by notic-
ing that input currents are differenced at the inverting-input
terminal and this difference current then flows through the
external feedback resistor to produce the output voltage.
Common-mode current biasing is generally useful to allow
operating with signal levels near ground or even negative as
this maintains the inputs biased at a V BE . Internal clamp
transistors (see note 5) catch-negative input voltages at ap-
proximately b 0.3 V DC but the magnitude of current flow has
to be limited by the external input network. For operation at
high temperature, this limit should be approximately 100 m A.
This new ``Norton'' current-differencing amplifier can be
used in most of the applications of a standard IC op amp.
Performance as a DC amplifier using only a single supply is
not as precise as a standard IC op amp operating with split
supplies but is adequate in many less critical applications.
New functions are made possible with this amplifier which
are useful in single power supply systems. For example,
biasing can be designed separately from the AC gain as was
shown in the ``inverting amplifier,'' the ``difference integra-
tor'' allows controlling the charging and the discharging of
the integrating capacitor with positive voltages, and the ``fre-
quency doubling tachometer'' provides a simple circuit
which reduces the ripple voltage on a tachometer output DC
voltage.
3
383662074.006.png
Typical Performance Characteristics
Open Loop Gain
Voltage Gain
Voltage Gain
Large Signal Frequency
Input Current
Supply Current
Response
Output Sink Current
Output Class-A Bias Current
Output Source Current
Supply Rejection
Mirror Gain
Maximum Mirror Current
TL/H/7936±9
4
383662074.007.png
 
Typical Applications (V a e 15 V DC )
Inverting Amplifier
Triangle/Square Generator
V ODC e
V a
2
A V j b
R2
R1
TL/H/7936±3
TL/H/7936±4
Frequency-Doubling Tachometer
Low V IN b V OUT Voltage Regulator
TL/H/7936±5
TL/H/7936±6
Non-Inverting Amplifier
Negative Supply Biasing
V ODC e
V a
2
R2
R3 V b
A V j
R2
R1
V ODC e
R2
R1
TL/H/7936±7
A V j
TL/H/7936±8
5
383662074.001.png 383662074.002.png 383662074.003.png
 
Zgłoś jeśli naruszono regulamin