40102(1).PDF

HCC/HCF40102B

HCC/HCF40103B

8-STAGE PRESETTABLE SYNCHRONOUS DOWN COUNTERS

. SYNCHRONOUS OR ASYNCHRONOUS

PRESET

. MEDIUM-SPEED OPERATION : f CL = 3.6MHz

. QUIESCENT CURRENT SPECIFIED TO 20V

(Plastic Package)

(Ceramic Package)

. 5V, 10V AND 15V PARAMETRIC RATINGS

. INPUT CURRENT OF 100 nA AT 18V AND 25 ° C

FOR HCC DEVICE

. 100% TESTED FOR QUIESCENT CURRENT

. MEETS ALL REQUIREMENTS OF JEDEC TEN-

(Chip Carrier)

TATIVE STANDARD N o . 13 A, ”STANDARD

SPECIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”

ORDER CODES :

HCC401XXBF

HCF401XXBEY

HCF401XXBC1

DESCRIPTION

The HCC40102B , HCC40103B , (extended tempera-

ture range) and the HCF40102B , HCF40103B (inter-

mediate temperature range) are monolithic integrated

circuits, available in 16-lead dual in-line plastic or ce-

ramic package. The HCC/HCF40102B , d

HCC/HCF40103B consist of an 8-stage synchronous

down counter with a single output which is active when

the internal count is zero. The HCC/HCF40102B is

configured as two cascaded 4-bit BCD counters, and

the HCC/HCF40103B contains a single 8-bit binary

counter. Each type has control inputs for enabling or

disabling the clock, for clearing the counter to its

maximum count, and for presetting the counter

either synchronously or asynchronously. All control

inputs and the CARRY-OUT/ZERO-DETECT out-

put are active-low logic. In normal operation, the

counter is decremented by one count on each posi-

tive transition of the CLOCK. Counting is inhibited

when the CARRY-IN/COUNTER ENABLE (CI/CE)

input is high. The CARRY-OUT/ZERO-DETEC

(CO/ZD) output goes low when the count reaches

zero if the CI/CE input is low, and remains low for

one full clock period. When the SYNCHRONOUS

PRESET-ENABLE (SPE) input is low, data at the

JAM input is clocked into the counter on the next

positive clock transition regardless of the state of the

CI/CE input. When the ASYNCHRONOUS

PRESET-ENABLE (APE) input is low, data at the

PIN CONNECTIONS

June 1989

1/13

40102B 2-DECADE BCD TYPE

40103B 8-BIT BINARY TYPE

. CASCADABLE

(TYP.) @ V DD = 10V

FOR HCC DEVICE

HCC/HCF40102B/40103B

JAM inputs is asynchronously forced into the

counter regardless of the state of the SPE, CI/CE,

or CLOCK inputs. JAM inputs JO-J7 represent two

4-bit BCD words for the HCC/HCF40102B and a

single 8-bit binary word for the HCC/HCF40103B .

When the CLEAR (CLR) input is low, the counter

is asynchronously cleared to its maximum count

(99 10 for the HCC/HCF40102B and 255 10 for

the HCC/HCF40103B) regardless of the state of

any other input. The precedence relationship be-

tween control input is indicated in the truth table. If

all control inputs are high at the tieme of zero count,

the counters will jump to the maximum count, giving

a counting sequence of 100 or 256 clock pulses

long. The HCC/HCF40102B and HCC/HCF40103B

may be cascaded using the CI/CE input and the

FUNCTIONAL DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V DD *

Supply Voltage : HCC Types

HCF Types

– 0.5 to + 20

– 0.5 to + 18

V i

Input Voltage

– 0.5 to V DD + 0.5

I I

DC Input Current (any one input)

P tot

Total Power Dissipation (per package)

Dissipation per Output Transistor

for T op = Full Package-temperature Range

200

100

T op

Operating Temperature : HCC Types

HCF Types

–55to+125

–40to+85

T stg

Storage Temperature

– 65 to + 150

Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only

and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification

is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.

* All voltages are with respect to V SS (GND).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Value

Unit

V DD

Supply Voltage : HCC Types

HCF Types

3to18

3to15

V I

Input Voltage

0 to V DD

T op

Operating Temperature : HCC Types

HCF Types

– 55 to + 125

–40to+85

2/13

HCC/HCF40102B/40103B

LOGIC DIAGRAMS

40102B

40103B

Detail logic diagram for flip-flops, FF0-FF7 used in logic diagrams for 40102B and 40103B .

3/13

HCC/HCF40102B/40103B

LOGIC DIAGRAMS (continued)

Timing Diagram for 40102B and 40103B

40102B

TRUTH TABLE

Control Inputs

Preset Mode

Action

CLR

APE

SPE CI/CE

Inhibit Counter

Synchronous

Count Down

Preset on Next Positive Clock Transition

Asynchronous

Preset Asynchrounously

Clear to Maximum Count

Notes : 1. 0 = Low level

1 = High level

X = Don’t care

2. Clock connected to clock input.

3. Synchronous operation : changes occur on negative-to-positive clock transitions..

JAM inputs : HCC/HCF010B ; MSD = J7, J6, J5, J4 (J7 is MSB)

LSD = J3, J2, J1, J0 (J3 is MSB)

HCC/HCF40103B Binary ; MSB = J7, LSB = J0

4/13

HCC/HCF40102B/40103B

STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)

Test Conditions

Value

Symbol

Parameter

V I

V O

|I O |V DD

T Low *

T Hi g h *

Unit

(V)

(

A) (V)

Min. Max. Min. Typ. Max. Min. Max.

I L

Quiescent

Current

0/ 5

0.04

150

HCC

Types

0/10

0.04 10

300

0/15

0.04 20

600

0/20

100

0.08 100

3000

0/ 5

0.04 20

150

HCF

Types

0/10

0.04 40

300

0/15

0.04 80

600

V OH

Output High

Voltage

0/ 5

< 1

4.95

0/10

< 1 10 9.95

9.95

0/15

< 1 15 14.95

14.95

V OL

Output Low

Voltage

5/0

< 1

0.05

10/0

< 1 10

0.05

15/0

< 1 15

0.05

V IH

Input High

Voltage

0.5/4.5 < 1

3.5

1/9

< 1 10

1.5/13.5 < 1 15

V IL

Input Low

Voltage

4.5/0.5 < 1

1.5

9/1

< 1 10

13.5/1.5 < 1 15

I OH

Output

Drive

Current

0/ 5

2.5

– 2

– 1.6 – 3.2

– 1.15

HCC

Types

0/ 5

4.6

5 – 0.64

– 0.51 – 1

– 0.36

0/10

9.5

10 – 1.6

– 1.3 – 2.6

– 0.9

0/15 13.5

15 – 4.2

– 3.4 – 6.8

– 2.4

0/ 5

2.5

5 – 1.53

– 1.36 – 3.2

– 1.1

HCF

Types

0/ 5

4.6

5 – 0.52

– 0.44 – 1

– 0.36

0/10

9.5

10 – 1.3

– 1.1 – 2.6

– 0.9

0/15 13.5

15 – 3.6

– 3.0 – 6.8

– 2.4

I OL

Output

Sink

Current

0/ 5

0.4

0.64

0.51

0.36

HCC

Types

0/10

0.5

1.6

1.3

2.6

0.9

0/15

1.5

4.2

3.4

6.8

2.4

0/ 5

0.4

0.52

0.44

0.36

HCF

Types

0/10

0.5

1.3

1.1

2.6

0.9

0/15

1.5

3.6

3.0

6.8

2.4

I IH ,I IL Input

Leakage

Current

HCC

Types

0/18

0.1

10 –5

0.1

Any Input

HCF

Types

0/15

0.3

10 –5

0.3

C I

Input Capacitance

Any Input

7.5

*T Low =– 55

Cfor HCC device : – 40

C for HCF device.

The Noise Margin for both ”1” and ”0” level is : 1V min. with V DD = 5V, 2V min. with V DD = 10V, 2.5 V min. with V DD = 15V.

C for HCC device : + 85

5/13

*T High = + 125

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