EMIF01-SMIC01F2.pdf

efrcom

5200,5500,6125,6126,6131,6133,6136,7373

N70,N72,N90

EMIF01-SMIC01F2

IPAD™

Single line EMI filter including ESD protection

Main application

■

Single ended microphone in mobile phones

and portable devices

Description

The EMIF01-SMIC01F2 is a highly integrated

device designed to suppress EMI/RFI noise for

microphone line filtering.

Flip-Chip

(8 Bumps)

The EMIF01-SMIC01F2 Flip-Chip packaging

means the package size is equal to the die size.

That is why EMIF01-SMIC01F2 is a very small

device.

Pin configuration (Bump side view)

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Additionally, this filter includes ESD protection

circuitry which prevents damage to the appication

when subjected to ESD surges up to 15 kV.

board

Benefits

■

High density capacitor

■

1 line low-pass-filter

Schematic

Lead free package

■

High efficiency in EMI filtering

■

Very low PCB space consumtion

Very thin package: 0.65 mm

50R

■

High efficiency in ESD suppression

(IEC 61000-4-2 level 4)

■

High reliability offered by monolithic integration

■

High density capacitor technology

■

Complies with the following standards:

IEC 61000-4-2

B2, B3, C2 are GND bumps

Level 4

15 kV (air discharge)

8 kV (contact discharge

Order code

on output pins

Part number

Marking

Level 1

2 kV (air and contact discharge)

EMIF01-SMIC01F2

on input pins

October 2006

Rev 1

1/7

www.st.com

mic ic

E50,E60,E70,

Characteristics

EMIF01-SMIC01F2

Characteristics

Table 1.

Absolute Maximum Ratings (T amb = 25° C)

Symbol

Parameter and test conditions

Value

Unit

Output lines (C3)

ESD discharge IEC61000-4-2, air discharge

ESD discharge IEC61000-4-2, contact discharge

V PP

Input lines (A3, A2, B1, C1)

ESD discharge IEC61000-4-2, air discharge

ESD discharge IEC61000-4-2, contact discharg

T j

Maximum junction temperature

125

° C

T op

Operating temperature range

- 40 to + 85

° C

T stg

Storage temperature range

- 55 to + 150

° C

Table 2.

Electrical Characteristics (T amb = 25° C)

Symbol

Parameter

V BR

Breakdown voltage

I RM

Leakage current @ V RM

V RM

Stand-off voltage

V CL

Clamping voltage

R d

Dynamic impedance

I PP

Peak pulse current

Symbol

Test conditions

Min.

Typ.

Max.

Unit

V BR

I R = 1 mA

I RM

V RM = 3 V per line

0.5

µA

C 1 , C 2 , C 3 , C 4 ,

V LINE = 0 V, V OSC = 30 mV, F = 1 MHz,

Tolerance ± 20%

0.85

C 5

V LINE = 0 V, V OSC = 30 mV, F = 1 MHz,

Tolerance ± 20%

140

R 1 , R 5

Tolerance ± 5%

Ω

R 2 , R 3 , R 4 Tolerance ± 5%

2.2

Ω

2/7

EMIF01-SMIC01F2

Ordering information scheme

Figure 1. Filtering measurements

0.00

-10.00

-20.00

-30.00

-40.00

-50.00

-60.00

-70.00

-80.00

F (Hz)

-90.00

100.0k

1.0M

10.0M

100.0M

1.0G

C3-B1 line

Figure 2. ESD response to IEC 61000-4-2

(+15 kV air discharge) on one

output line

Figure 3. ESD response to IEC 61000-4-2

(-15 kV air discharge) on one output

line

Vin=5V/d

Vout =5V/d

1µs/d

Ordering information scheme

EMIF yy - xxx zz Fx

EMI Filter

Number of lines

Information

x = resistance value (Ohms)

z = capacitance value / 10(pF)

3 letters = application

2 digits = version

Package

F = Flip-Chip

x = 1: 500µm, Bump = 310µm

= 2: Leadfree Pitch = 500µm, Bump = 310µm

3/7

Package information

EMIF01-SMIC01F2

Package information

Figure 4. Flip-Chip dimensions

500 µm ± 50

310 µm ± 50

650 µm ± 65

1.42 mm ± 50 µm

Figure 5. Flip-Chip footprint

Figure 6. Marking

Copper pad Diameter:

250 µm recommended, 300 µm max.

Dot, ST logo

xx = marking

z = manufacturing location

yww = datecode

(y = year

ww = week)

Solder stencil opening:

330 µm recommended

Solder mask opening recommendation:

340 µm min. for 300 µm copper pad diameter

4/7

EMIF01-SMIC01F2

Package information

Figure 7. Tape and reel specification

Dot identifying Pin A1 location

4 +/- 0.1

Ø 1.5 +/- 0.1

1.52

0.73 +/- 0 .05

4 +/- 0.1

All dimensions in mm

User direction of unreeling

In order to meet environmental requirements, ST offers these devices in ECOPACK®

packages. These packages have a lead-free second level interconnect. The category of

second level interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an ST trademark.

ECOPACK specifications are available at: www.st.com.

Note:

More packing informations are available in the application note

AN1235: “Flip-Chip: Package description and recommendations for use”

AN1751: "EMI Filters: Recommendations and measurements"

5/7

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