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4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER
HCC/HCF4035B
4-STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER
. 4-STAGE CLOCKED SHIFT OPERATION
Whith JK inputs connected together, the first stage
becomes a D flip-flop. An asynchronous common
RESET is also provided.
. ASYNCHRONOUS TRUE/COMPLEMENT CON-
TROL ON ALL OUTPUTS
. STATIC FLIP-FLOP OPERATION ; MASTER-
. BUFFERED INPUTS AND OUTPUTS
. HIGH SPEED 12MHz (typ.) AT V DD = 10V
. QUIESCENT CURRENT SPECIFIED TO 20V
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
FOR HCC DEVICE
. 5V, 10V, AND 15V PARAMETRIC RATINGS
. INPUT CURR 100nA AT 18V AND 25 ° C FOR
HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
M1
(Micro Package)
C1
(Plastic Chip Carrier)
. MEETS ALL REQUIREMENTS OF JEDEC TEN-
ORDER CODES :
HCC4035BF
. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
°
HCF4035BM1
HCF4035BEY
HCF4035BC1
DESCRIPTION
The HCC4035B (extended temperature range) and
HCF4035B (intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micro package. The HCC/HCF4035B is a four-
stage clocked signal serial register with provision for
synchronous PARALLEL inputs to each stage and
SERIAL inputs to the first stage via JK logic. Regis-
ter stages 2, 3, and 4 are coupled in a serial D flip-
flop configuration when the register is in the serial
mode (PARALLEL/SERIAL control low). Parallel
entry into each register stage is permitted when the
PARALLEL/SERIAL control is high. In the parallel or
serial mode information is transferred on positive
clock transitions. When the TRUE/COMPLEMENT
control is high, the true contents of the register are
available at the output terminals. When the
TRUE/COMPLEMENT control is low, the outputs
are the complements of the data in the register. The
TRUE/COMPLEMENT control functions asyn-
chronously with respect to the CLOCK signal. JK
input logic is provided on the first stage SERIAL
input to minimize logic requirements particularly in
counting and sequence-generation applications.
PIN CONNECTIONS
July 1989
1/14
. SYNCHRONOUS PARALLEL ENTRY ON ALL 4
. JK INPUTS ON FIRST STAGE
STAGES
SLAVE CONFIGURATION
TATIVE STANDARD N
21704831.002.png
HCC/HCF4035B
FUNCTIONAL DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V DD *
Supply Voltage : HCC Types
HCF Types
– 0.5 to + 20
– 0.5 to + 18
V
V
V i
Input Voltage
– 0.5 to V DD + 0.5
V
I I
DC Input Current (any one input)
±
10
mA
P tot
Total Power Dissipation (per package)
Dissipation per Output Transistor
for T op = Full Package-temperature Range
200
mW
100
mW
T op
Operating Temperature : HCC Types
HCF Types
– 55 to + 125
–40to+85
C
°
C
C
Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
* All voltage values are referred to V SS pin voltage.
Storage Temperature
– 65 to + 150
°
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V DD
Supply Voltage: HCC Types
HCF Types
3to18
3to15
V
V
V I
Input Voltage
0 to V DD
V
T op
Operating Temperature: HCC Types
HCF Types
-55 to +125
-40 to +85
o C
o C
2/14
°
T stg
21704831.003.png
HCC/HCF4035B
LOGIC DIAGRAM
TRUTH TABLE
FIRST STAGE
Clock
(ø)
t n-1 (inputs)
t n (outputs)
__
/
J
KR n-1
Q n
__
__
/
O
X
O
O
O
__
__
/
I
X
O
O
I
__
X
O
O
I
O
__
__
/
I
O
O Q n-1 Q n-1
____
Toggle
Mode
__
/
__
X
I
O
I
I
\__
X
X
O Q n-1
Q n-1
X
X
X
I
X
O
3/14
__
21704831.004.png
HCC/HCF4035B
STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)
Test Conditions
Val ue
Symbol
Parameter
V I
V O
|I O |V DD
T Low *
25
°
C
T Hi g h *
Unit
(V)
(V)
(
m
A) (V)
Min. Max. Min. Typ. Max. Min. Max.
I L
Quiescent
Current
0/ 5
5
5
0.04
5
150
HCC
Types
0/10
10
10
0.04 10
300
0/15
15
20
0.04 20
600
0/20
20
100
0.08 100
3000
m
A
0/ 5
5
20
0.04 20
150
HCF
Types
0/10
10
40
0.04 40
300
0/15
15
80
0.4
80
600
V OH
Output High
Voltage
0/ 5
< 1
5
4.95
4.95
4.95
0/10
< 1 10 9.95
9.95
9.95
V
0/15
< 1 15 14.95
14.95
14.95
V OL
Output Low
Voltage
5/0
< 1
5
0.05
0.05
0.05
10/0
< 1 10
0.05
0.05
0.05
V
15/0
< 1 15
0.05
0.05
0.05
V IH
Input High
Voltage
0.5/4.5 < 1
5
3.5
3.5
3.5
1/9
< 1 10
7
7
7
V
1.5/13.5 < 1 15
11
11
11
V IL
Input Low
Voltage
4.5/0.5 < 1
5
1.5
1.5
1.5
9/1
< 1 10
3
3
3
V
13.5/1.5 < 1 15
4
4
4
I OH
Output
Drive
Current
0/ 5
2.5
5
– 2
– 1.6 – 3.2
– 1.15
HCC
Types
0/ 5
4.6
5 – 0.64
– 0.51 – 1
– 0.36
0/10
9.5
10 – 1.6
– 1.3 – 2.6
– 0.9
0/15 13.5
15 – 4.2
– 3.4 – 6.8
– 2.4
mA
0/ 5
2.5
5 – 1.53
– 1.36 – 3.2
– 1.1
HCF
Types
0/ 5
4.6
5 – 0.52
– 0.44 – 1
– 0.36
0/10
9.5
10 – 1.3
– 1.1 – 2.6
– 0.9
0/15 13.5
15 – 3.6
– 3.0 – 6.8
– 2.4
I OL
Output
Sink
Current
0/ 5
0.4
5
0.64
0.51
1
0.36
HCC
Types
0/10
0.5
10
1.6
1.3
2.6
0.9
0/15
1.5
15
4.2
3.4
6.8
2.4
mA
0/ 5
0.4
5
0.52
0.44
1
0.36
HCF
Types
0/10
0.5
10
1.3
1.1
2.6
0.9
0/15
1.5
15
3.6
3.0
6.8
2.4
I IH ,I IL Input
leakage
Curent
HCC
Types
0/18
18
±
0.1
±
10 –5
±
0.1
±
1
Any Input
m
A
HCF
Types
0/15
15
±
0.3
±
10 –5
±
0.3
±
1
C I
Input Capacitance
Any Input
5
7.5
pF
*T Low =–55
°
Cfor HCC device : – 40
°
C for HCF device.
C for HCF device.
The Noise Margin for both ”1” and ”0” level is : 1V min. with V DD = 5 V, 2V min. with V DD = 10V, 2.5V min. with V DD = 15V.
°
C for HCC device : + 85
°
4/14
*T High = + 125
21704831.005.png
HCC/HCF4035B
DYNAMIC ELECTRICAL CHARACTERISTICS (T amb =25
°
C, C L = 50pF, R L = 200k
W
,
typical temperature coefficient for all V DD = 0.3%/
°
C, all input rise and fall time = 20ns)
Symbol
Parameter
Test Conditions
Value
Unit
V DD (V) Min. Typ. Max.
CLOCKED OPERATION
t PLH ,t PHL Propagation Delay Time
5
250
500
10
100
200
ns
15
75
150
t THL ,t TL H Transition Time
5
100
200
10
50
100
ns
15
40
80
f CL
Maximum Clock Input Frequency
5
2
4
10
6
12
MHz
15
8
16
t W
Clock Pulse Width
5
100
200
10
45
90
ns
15
30
60
t r ,t f
Clock Input Rise or Fall Time
5
15
10
15
m
s
15
15
t setup
Data Setup Time J/K Lines
5
110
220
10
40
80
ns
15
30
60
t setup
Data Setup Time Parallel-In-Lines
5
70
140
10
25
50
ns
15
20
40
RESET OPERATION
t PLH ,t PHL Propagation Delay Time
5
230
460
10
100
200
ns
15
80
160
t W
Reset Pulse Width
5
125
250
10
55
110
ns
15
40
40
5/14
21704831.001.png

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