MC144110-11.PDF

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SEMICONDUCTOR TECHNICAL DATA
Order this document
by MC144110/D
CMOS LSI
MC144110
The MC144110 and MC144111 are low–cost 6–bit D/A converters with serial
interface ports to provide communication with CMOS microprocessors and
microcomputers. The MC144110 contains six static D/A converters; the
MC144111 contains four converters.
Due to a unique feature of these DACs, the user is permitted easy scaling of
the analog outputs of a system. Over a 5 to 15 V supply range, these DACs may
be directly interfaced to CMOS MPUs operating at 5 V.
P SUFFIX
PLASTIC DIP
CASE 707
18
1
Direct R–2R Network Outputs
DW SUFFIX
SOG PACKAGE
CASE 751D
Buffered Emitter–Follower Outputs
20
Serial Data Input
1
Digital Data Output Facilitates Cascading
Direct Interface to CMOS m P
MC144111
Wide Operating Voltage Range: 4.5 to 15 V
Wide Operating Temperature Range: 0 to 85 ° C
P SUFFIX
PLASTIC DIP
CASE 646
Software Information is Contained in Document M68HC11RM/AD
14
1
BLOCK DIAGRAM
DW SUFFIX
SOG PACKAGE
CASE 751G
16
Qn
OUT
Rn
OUT
V DD
Q1 OUT
R1 OUT
1
ORDERING INFORMATION
MC144110P Plastic DIP
MC144110DW SOG Package
2R
MC144111P Plastic DIP
MC144111DW SOG Package
R
R
R
R
R
2R
2R
2R
2R
2R
2R
HEX BUFFER (INVERTING)
ENB
C
HEX LATCH
CLK
D
*
C Q
C
6–BIT SHIFT REGISTER
D in
D
D out
* Transparent Latch
REV 1
8/95
W Motorola, Inc. 1995
MC144110
MC144111
1
MOTOROLA
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PIN ASSIGNMENTS
MC144110P
MC144110DW
D in
1
18
V DD
D in
1
20
V DD
Q1 Out
2
17
D out
Q1 Out
2
19
D out
R1 Out
3
16
R6 Out
R1 Out
3
18
R6 Out
Q2 Out
4
15
Q6 Out
Q2 Out
4
17
Q6 Out
R2 Out
5
14
R5 Out
R2 Out
5
16
R5 Out
Q3 Out
6
13
Q5 Out
Q3 Out
6
15
Q5 Out
R3 Out
7
12
R4 Out
R 3 Out
7
14
R4 Out
ENB
8
11
Q4 Out
ENB
8
13
Q4 Out
V SS
9
10
CLK
V SS
9
12
CLK
NC
10
11
NC
MC144111P
MC144111DW
D in
1
14
V DD
D in
1
16
V DD
Q1 Out
2
13
D out
Q1 Out
2
15
D out
R1 Out
3
12
R4 Out
R1 Out
3
14
R4 Out
Q2 Out
4
11
Q4 Out
Q2 Out
4
13
Q4 Out
R2 Out
5
10
R3 Out
R2 Out
5
12
R3 Out
ENB
6
9
Q3 Out
ENB
6
11
Q3 Out
V SS
7
8
CLK
V SS
7
10
CLK
NC
8
9
NC
NC = NO CONNECTION
MC144110
MC144111
MOTOROLA
2
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MAXIMUM RATINGS* (Voltages referenced to V SS )
ÁÁÁÁÁÁÁÁÁÁÁ
Parameter
Symbol
Value
Unit
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields; however, it is ad-
vised that precautions be taken to avoid
application of voltage higher than maximum
rated voltages to this high–impedance circuit.
For proper operation it is recommended that
V in and V out be constrained to the range V SS
DC Supply Voltage
V DD
– 0.5 to + 18
V
Input Voltage, All Inputs
V in
– 0.5 to V DD + 0.5
V
DC Input Current, per Pin
I
± 10
mA
Power Dissipation (Per Output)
T A = 70 ° C, MC144110
MC144111
T A = 85 ° C, MC144110
MC144111
P OH
mW
3
30
50
10
20
V DD .
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either V SS
or V DD ).
3
Power Dissipation (Per Package)
T A = 70 ° C, MC144110
MC144111
T A = 85 ° C, MC144110
MC144111
P D
mW
100
150
25
50
C
* Maximum Ratings are those values beyond which damage to the device may occur.
T stg
– 65 to + 150
°
ELECTRICAL CHARACTERISTICS (Voltages referenced to V SS , T A = 0 to 85 ° C unless otherwise indicated)
Symbol
Parameter
Test Conditions
V DD
Min
Max
Unit
V IH
High–Level Input Voltage (D in , ENB, CLK)
5
10
15
3.0
3.5
4
V
V IL
Low–Level Input Voltage (D in , ENB, CLK)
5
10
15
0.8
0.8
0.8
V
I OH
High–Level Output Current (D out )
V out = V DD – 0.5 V
5
– 200
m A
I OL
Low–Level Output Current (D out )
V out = 0.5 V
5
200
m
A
I DD
Quiescent Supply Current
MC144110
MC144111
I out = 0 m A
15
15
12
8
mA
I in
Input Leakage Current (D in , ENB, CLK)
V in = V DD or 0 V
15
±
1
m
A
V nonl
Nonlinearity Voltage (Rn Out)
See Figure 1
5
10
15
100
200
300
mV
V step
Step Size (Rn Out)
See Figure 2
5
10
15
19
39
58
137
274
411
mV
V offset Offset Voltage from V SS
D in = $00, See Figure 1
1
LSB
I E
Emitter Leakage Current
V Rn Out = 0 V
15
10
m
A
h FE
DC Current Gain
I E = 0.1 to 10.0 mA
T A = 25
40
C
V BE
Base–to–Emitter Voltage Drop
I E = 1.0 mA
0.4
0.7
V
MOTOROLA
MC144110
MC144111
3
(V in or V out )
Storage Temperature Range
°
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SWITCHING CHARACTERISTICS
(Voltages referenced to V SS , T A = 0 to 85 ° C, C L = 50 pF, Input t r = t f = 20 ns unless otherwise indicated)
Symbol
Parameter
V DD
Min
Max
Unit
t wH
Positive Pule Width, CLK (Figures 3 and 4)
5
10
15
2
1.5
1
m s
t wL
Negative Pulse Width, CLK (Figure 3 and 4)
5
10
15
5
3.5
2
m s
t su
Setup Time, ENB to CLK (Figures 3 and 4)
5
10
15
5
3.5
2
m s
t su
Setup Time, D in to CLK (Figures 3 and 4)
5
10
15
1000
750
500
ns
t h
Hold Time, CLK to ENB (Figures 3 and 4)
5
10
15
5
3.5
2
m s
t h
Hold Time, CLK to D in (Figures 3 and 4)
5
10
15
5
3.5
2
m
s
t r , t f
Input Rise and Fall Times
5 – 15
2
m s
C in
Input Capacitance
5 – 15
7.5
pF
100
75
V nonl
ACTUAL
50
IDEAL
25
V offset
0 0
$00
15
$0F
31
$1F
47
$2F
63
$3F
PROGRAM STEP
LINEARITY ERROR (integral linearity). A measure of how
straight a device’s transfer function is, it indicates the worst–case
deviation of linearity of the actual transfer function from the best–
fit straight line. It is normally specified in parts of an LSB.
Figure 1. D/A Transfer Function
MC144110
MC144111
MOTOROLA
4
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V Rn OUT
STEP
SIZE
V DD
64
(For any adjacent pair of digital numbers)
V DD
64
Step Size =
± 0.75
DIGITAL NUMBER
Figure 2. Definition of Step Size
ENB
50%
t su
t h
CLK
50%
C 1
C 2
C N
t wH
t wL
D in
D 1
D 2
D N
t su
t h
Figure 3. Serial Input, Positive Clock
ENB
t su
t h
CLK
C 1
C 2
C N
t wL
t wH
D in
D 1
D 2
D N
t su
t h
Figure 4. Serial Input, Negative Clock
MOTOROLA
MC144110
MC144111
5
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