L6372.PDF

L6372

OCTAL INDUSTRIAL INPUT INTERFACE

PRODUCT PREVIEW

INPUT STATUS MONITORING BY MEANS

OF CURRENT LEVELS DETECTION

EXTERNALLY PROGRAMMABLE UPPER

CURRENT LEVEL

INPUT OPEN LINE DETECTION

INPUT PROTECTION BY MEANS OF INTER-

NAL DIODES CLAMPING TO GROUND AND

SUPPLY VOLTAGE

DIGITAL FILTERING OF NOISE ON EACH

CHANNEL

ALLOWS IMPLEMENTATION WITH MINI-

MUM POWER DISSIPATION OF 8 CURRENT

SINKING INPUTS ACCORDING TO THE IEC

STANDARD

DATA TRANSFER FROM PARALLEL IN TO

SERIAL OUT

MULTIPOWER BCD TECHNOLOGY

POWERDIP 16+2+2

SO 16+2+2

ORDERING NUMBERS: L6372DP (Powerdip16+2+2)

L6372FP (SO16+2+2)

the 24V/6mA signal levels (IEC1131, 24VDC,

type 2). 8 input lines can be connected to the de-

vice.

Up to 8 input lines can be connected to each de-

vice. Several devices can be linked to monitor

more than 8 lines.

DESCRIPTION

The L6372 is especially designed for use as a line

receiver in industrial control systems based on

FUNCTIONAL DIAGRAM

September 1994

1/15

This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

L6372

PIN CONNECTION

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V S

Supply Voltage (t W

10ms)

V Ilog

Logic Input Voltage (DC)

-0.3 to 7

(see channel Protection)

I Ilog

11, 12

Logic Input Forced Current, per pin

± 1

I I

1, 2, 3,

4, 17,

18, 19,

Channel Input Current (t W

1ms)

(see channel Protection)

V line - i

Channel Input Voltage (see channel Protection)

-0.3 to V S +0.3

I out

Output Current

10 to -20

V out

Output Voltage

-3 to 5

I set

7, 8

Setting pins Forced Current

V set

Setting pins Forced Voltage

- 0.3 to 5

T op

Ambient Temperature Operating Range

- 25 to 85

T j

Junction Temperature Operating Range

(see Overtemperature Protection)

- 25 to 125

T st

Storage Temperature Range

- 55 to 150

Note: ESD immunity for pins 1,2,3,4,17,18,19 and 20 is guaranteed up to 1200V (Human Body Model–Negative spike versus V S )

2/15

L6372

ELECTRICAL CHARACTERISTICS (T j = -25 to 125 ° C; V S = 24V; unless otherwise specified.)

DC OPERATION

Symbol

Parameter

Test Condition

Min. Typ. Max. Unit

V S

Supply Voltage

(operative)

V sh

Power-on Upper Threshold

V S Variable

9.8 10.4

V S Hys

Power-on Hysteresis

400 800 1600 mV

I S

Supply Current

All Inputs I i = 1mA, V S = 24V

10.5

All Inputs I i = 1mA, V S = 24V

V oh

Output Voltage High

I O =0;V S = 12 to 35V

4.8

5.2

5.5

I O = 3mA; V S = 12 to 35V

3.5

I oh

Output Source Current

V O = 2V; V S =12to35V

V ol

Output Voltage Low

I O = 4mA; V S = 12 to 35V

0.4

V S = 24V; T j= 25

0.15

I ol

Output Sink Current

V O = 5V; V S =12to35V

V S = 24V; T j= 25

V th+ (*)

9 to 12 Positive Going Input Threshold

V S = 12 to 35V

1.3

1.6

V th- (*)

9 to 12 Negative Going Input Threshold V S = 12 to 35V

0.85 1.1

1.4

Hy in (*) 9 to 12 Input Hysteresis

V S = 12 to 35V

0.1

0.2

0.4

I lin

9 to 12 Input Leak Current

V S = 12 to 35V; V in =-0.2 to 5.2V -100

100

I 1

1to4,

17 to 20

Limited Input Current

V I= 0.5 to 1.1V

0.375 0.550 0.750 mA

I 2

1to4,

17 to 20

Limited Input Current

R ref = 12K

V in = 2.4 to 30V

6.1

6.8 7.48 mA

1.26V/R ref for

R ref = 11 to 30K

•

V reg

1to4,

17 to 20

Regulated Input Voltage

I I = 0.750 to 2mA

1.0

1.2

1.6

I I = 2 to 6.1mA

1.0

1.2

2.4

V 11 (*)

1 to 4,

17 to 20

Comparator 1 Low Threshold

0.4

0.7

V 1h (*)

1 to 4,

17 to 20

Comparator 1 High Threshold

0.9

1.0

H c1 (*)

1 to 4,

17 to 20

Comparator 1 Hysteresis

0.1

0.2

0.4

V 2l

1to4,

17 to 20

Comparator 2 Low Threshold

1.6

2.0

V 2h

1to4,

17 to 20

Comparator 2 High Threshold

2.2

2.4

H c2

1to4,

17 to 20

Comparator 2 Hysteresis

0.1

0.2

0.4

(*) Guaranteed by design, not tested.

3/15

V S = 12 to 35V T j = -25

V S = 12 to 35V T j =25

V S = 12 to 35V T j = 125

I 2 appr. = K 2

L6372

ELECTRICAL CHARACTERISTICS (T j = -25 to 125

C; unless otherwise specified.)

AC OPERATION

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

F osc (*)

Oscillator Frequency

C = 1.2nF; R ref = 12K

8.8

11.2

kHz

I chg (*)

Current Charging

R ref = 12K

V hosc

Upper Switching Threshold

3.2

3.7

V losc

Lower Switching Threshold,

1.5

t sv

Time Serial Valid

Time from 0.85V on pin P/S to

the first rising edge of the

external clock

0.8

t so

Time Serial Out

Time from negative edge on pin

P/S to activation of the output

buffer of D out with the content of

the eighth flip/flop

0.35

t ckh

High Level Clock Duration

300

t ckl

Low Level Clock Duration

300

F clock

Clock Frequency

1.5

MHz

t r

Clock Rise Time

500

t f

Clock Fall Time

500

t su

Set up Time for D in

before the Clock Rising Edge

200

t hold

Hold Time for D in after the

Rising Edge of the Clock

t delay

Delay Time of D out after the

rising Edge of the Clock

150

pdin

Internal Delay, D in to the D

Input of the First of the Eight

Flip/Flops

200

(*) F osc and I chg vary inversely to R ref , for R ref from 11K

to 30K

4/15

L6372

THERMAL DATA

Symbol

Parameter

DIP 20

SO 20

Unit

R th j-pin

Thermal Resistance Junction to Pin

C/W

R th j-amb 1

Thermal Resistance Junction to Ambient

(see Thermal Characteristics)

C/W

R th j-amb 2

Thermal Resistance Junction to Ambient

(see Thermal Characteristics)

C/W

THERMAL CHARACTERISTICS

R th j-pin

POWERDIP . The thermal resistance is re-

ferred to the thermal path from the dissi-

pating region on the top surface of the sili-

con chip, to the points along the four

central pins of the package, at a distance

of 1.5 mm away from the stand-offs.

R th j-amb 2

If the power dissipating pins (the four cen-

tral ones), as well as the others, have a

minimum thermal connection with the ex-

ternal world (very thin strips only) so that

the dissipation takes place through still air

and through the PCB itself.

It is the same situation of point above,

without any heatsinking surface created on

purpose on the board.

Additional data for the PowerDip package can be

found in:

Application Note 9030:

Thermal Characteristics of the Power Dip

20, 24 Packages Soldered on 1,2,3 oz.

Copper PCB

SO . Similarly, the reference point is the

knee on the four central pins, where the

pins are upwardly bent and the soldering

joint with the PCB footprint can be made.

R th j-amb 1

If a dissipating surface, thick at least 35 m m

and with a surface similar or bigger than

the one shown, is created making use of

the printed circuit. Such heatsinking sur-

face is considered on the bottom side of an

horizontal PCB (worst case).

Figure 1: Printed Heatsink

5/15

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