KS0104B.PDF

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KS0104B 80CH SEGMENT DRIVER FOR DOT MATRIX LCD
INTRODUCTION
100QFP-1420C
The KS0104B is a LCD driver LSI which is fabricated by low power CMOS
high voltage process technology.
This device consists of 80 bit bi-directional shift register, 80 bit data latch
and 80 bit driver.
FEATURES
Power supply voltage : +5V 10%, +3V 10%
Supply voltage for display : 6 to 28V (VDD-VEE)
Parallel data processing (4 bit)
Applicable LCD duty : 1/64 to 1/256
Interface
Driver
COM
SEG (cascade)
KS0086
Other KS0104B
High voltage CMOS process
100 QFP and bare chip available.
BLOCK DIAGRAM
S1 S2 S3
S78 S79 S80
V1
V3
V4
VEE
80-bit 4-level driver
M
DISPOFFB
80-bit level shifter
CL1
80-bit data latch
D0
D1
D2
D3
20 x 4 bit bidirectional register
SHL
CL2
EIB
shift CL
VDD
power down
function
VSS
EOB
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KS0104B 80CH SEGMENT DRIVER FOR DOT MATRIX LCD
PIN CONFIGURATION
S31
S32
S33
S34
S35
S36
S37
S38
S39
S40
S41
S42
S43
S44
S45
S46
S47
S48
S49
S50
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
KS0104B
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
EIB
CL1
NC
CL2
D0
D1
D2
D3
VSS
SHL
VDD
DISPOFFB
M
NC
V1
V3
V4
VEE
NC
EOB
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KS0104B 80CH SEGMENT DRIVER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT
Characteristic
Symbol
Value
Unit
Operating Voltage
VDD
-0.3 ~ 6.0
Driver Supply Voltage
V LCD
0 ~ 30
V
Input Voltage
V IN
-0.3 ~ VDD +0.3
Operating Temperature
T OPR
-30 ~ +85
o
C
Storage Temperature
T STG
-55 ~ +150
Voltage greater than above may result in damage to the circuit.
VDD(V1)
V3
VDD-VEE
+V
to LCD panel
S1~S80
KS0104B
V4
V1 > V3 > V4 > VEE
V1 V VDD
VEE
VSS
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KS0104B 80CH SEGMENT DRIVER FOR DOT MATRIX LCD
ELECTRICAL CHARACTERISTICS
DC Characteristics (VDD = 2.7 to 5.5 V, VSS=0V, Ta=-30 to +85 o C, C L = 15pF)
Characteristics Symbol
Condition
Min
Typ Max Unit
Operating Voltage
VDD
-
2.7
-
5.5
V
Driver Supply Voltage V LCD
V LCD =VDD - VEE
6
-
28
Input Voltage (*1)
V IH
-
0.8VDD -
-
V IL
-
0
- 0.2 VDD
Output Voltage (*2)
V OH
I OH = -0.4 mA
VDD-0.4 -
-
V
V OL
I OL = 0.4 mA
-
-
0.4
Input Leakage
Current 1(*1)
I IL1
V IN =VDD to VSS
-1
-
1
mA
Input Leakage
I IL2
V IN = VDD to VEE
-25
-
25
Current 2(*3)
On Resistance (*4)
R ON
I ON = 100 mA
-
2
4
kW
I STB
VDD = 5.5 V (*5)
-
-
200
mA
f CL2 = 1 MHz,
f CL2 = 19.2 kHz,
f M = 40 Hz,
V LCD = 26 V,
No load
VDD = 5.5 V (*6)
-
-
3
mA
Supply Current
I DD
VDD = 2.7 V (*6)
-
-
1
mA
I EE
VDD = 5.5 V (*7)
-
150 500
mA
NOTES
(*1) Applied to CL1, CL2, EIB, EOB, D0 to D3, SHL, DISPOFFB, M pin.
(*2) EIB, EOB pin
(*3) V1, V3, V4 pin
(*4) VDD-VEE=26V (VDD=3V), VEE=28V(VDD=5V), V1=VDD, V3=VDD-2/10(VDD-VEE), V4=VEE+2/10(VDD-VEE),
S1 to S80 pin
(*5) Display data pattern : 0000, Current from VDD to VSS when the display data is not processing
(SHL=VSS, D0 to D3=VSS, DISPOFFB=VDD, M=VSS)
(*6) Display data pattern: 1010, Current from VDD to VSS when the display data is processing
(*7) Display data pattern: 1010, Current on VEE pin
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KS0104B 80CH SEGMENT DRIVER FOR DOT MATRIX LCD
AC Characteristics (VDD=+5V 10%, VSS=0V, Ta=-30 to +85 o C, C L =15pF)
Characteristic
Symbol
Condition
Min
Typ
Max
Unit
Clock Cycle Time
t CYC
Duty=50%
125
-
-
Clock Pulse Width
t W
-
45
-
-
Clock Rise/Fall Time
t R /t F
-
-
-
30
Data Set-Up Time
t DS
-
30
-
-
Data Hold Time
t DH
-
30
-
-
Clock Set-Up Time1
T CS1
-
80
-
-
Clock Set-Up Time2
T CS2
-
10
-
-
ns
Clock Hold Time
t CH
-
80
-
-
Propagation Delay Time
t PHL
EOB Output
-
-
80
EIB Output
80
EIB, EOB Set-Up Time
t PSU
EOB Input
30
-
-
EIB Input
30
(VDD=+3V 10%, VSS=0V, Ta=-30 to +85 o C, C L =15pF)
Characteristic
Symbol
Condition
Min
Typ
Max
Unit
Clock Cycle Time
t CYC
Duty=50%
250
-
-
Clock Pulse Width
t W
-
95
-
-
Clock Rise/Fall Time
t R /t F
-
-
-
30
Data Set-Up Time
t DS
-
50
-
-
Data Hold Time
t DH
-
50
-
-
Clock Set-Up Time1
T CS1
-
80
ns
Clock Set-Up Time2
t CS2
-
15
-
-
Clock Hold Time
t CH
-
120
-
-
Propagation Delay Time
t PHL
EOB Output
-
-
155
EIB Output
155
EIB, EOB Set-Up Time
t PSU
EOB Input
65
-
-
EIB Input
65
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