62C64.PDF

1CY 6 26 4

PRELIMINARY

CY6264

8K x 8 Static RAM

Features

over 70% when deselected. The CY6264 is packaged in a

450-mil (300-mil body) SOIC.

An active LOW write enable signal (WE) c ont rols th e w rit-

ing/reading operation of the memory. When CE 1 and WE in-

puts are both LOW and CE 2 is HIGH, data on the eight data

input/output pins (I/O 0 through I/O 7 ) is written into the memory

location addressed by the address present on the address

pins (A 0 through A 12 ). Reading the device is acc omp lished by

selecting the device and enabling th e ou tputs, CE 1 and OE

active LOW, CE 2 active HIGH, while WE remains inactive or

HIGH. Under these conditions, the contents of the location ad-

dressed by the information on address pins is present on the

eight data input/output pins.

The input/output pins remain in a high-impedance state unless

t he c hip is selected, outputs are enabled, and write enable

(WE) is HIGH. A die coat is used to insure alpha immunity.

• 55, 70 ns access times

• CMOS for optimum speed/pow er

• Easy memory expansion with CE 1 , CE 2 , and OE fea-

tures

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

Functional Description

The CY6264 is a high-performance CMOS static RAM orga-

nized as 8192 words by 8 bits. Easy mem ory expansion is

provided by an active LOW chip enable (CE 1 ), an acti ve HIGH

chip enable (CE 2 ), and active LOW output enable (OE) and

three-state driver s. Both devices have an automatic pow-

er-down feature (CE 1 ), reducing the power consumption by

Logic Block Diagram

Pin Configuration

Top View

SOIC

I/O 0

A 4

A 5

A 6

A 7

A 8

A 9

A 10

A 11

A 12

I/O 0

I/O 1

I/O 2

GND

V CC

CE 2

A 3

A 2

A 1

A 0

CE 1

I/O 7

I/O 6

I/O 5

I/O 4

I/O 3

INPUT BUFFER

I/O 1

A 1

A 2

A 3

A 4

A 5

A 6

A 7

A 8

I/O 2

I/O 3

256 x 32 x 8

ARRAY

I/O 4

CY6264-2

I/O 5

I/O 6

CE 1

CE 2

COLUMN DECODER

POWER

DOWN

I/O 7

CY6264-1

Selection Guide

CY6264-55

CY6264-70

Maximum Access Time (ns)

Maximum Operating Current (mA)

100

Maximum Standby Current (mA)

20/15

Shaded area contains advanced information.

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600

October 1994 – Revised June 1996

PRELIMINARY

CY6264

Maximum Ratings

Output Current into Outputs (LOW)............................. 20 mA

Static Discharge Voltage .......................................... >2001V

(per MIL-STD-883, Method 3015)

Latch-Up Current .................................................... >200 mA

(Above which the useful life may be impaired. For user guide-

lines, not tested.)

Storage Temperature ................................. –65

C to +150

Supply Voltage to Ground Potential ............... –0.5V to +7.0V

DC Voltage Applied to Outputs

in High Z State [1] ............................................ –0.5V to +7.0V

DC Input Voltage [1] ......................................... –0.5V to +7.0V

C to +125

Operating Range

Range

Ambient

Temperature

V CC

Commercial

C to +70

10%

Electrical Characteristics Over the Operating Range

6264-55

6264-70

Parameter

Description

Test Conditions

Min.

Max.

Min.

Max.

Unit

V OH

Output HIGH Voltage

V CC = Min., I OH = –4.0 mA

2.4

V OL

Output LOW Voltage

V CC = Min., I OL = 8.0 mA

0.4

V IH

Input HIGH Voltage

2.2

V CC

2.2

V CC

V IL

Input LOW Voltage [1]

–0.5

0.8

–0.5

0.8

I IX

Input Load Current

GND < V I < V CC

–5

I OZ

Output Leakage

Current

GND < V I < V CC ,

Output Disabled

–5

I OS

Output Short

Circuit Current [2]

V CC = Max.,

V OUT = GND

–300

I CC

V CC Operating

Supply Current

V CC = Max.,

I OUT = 0 mA

100

I SB1

Automatic CE 1

Power–Down Current

Max. V CC , CE 1 > V IH,

Min. Duty Cycle = 100%

I SB2

Automatic CE 1

Power–Down Current

Max. V CC , CE 1 > V CC – 0.3V,

V IN > V CC – 0.3V or V IN < 0.3V

Shaded area contains advanced information.

Capacitance [3]

Parameter

Description

Test Conditions

Max.

Unit

C IN

Input Capacitance

C, f = 1 MHz,

V CC = 5.0V

C OUT

Output Capacitance

Notes:

1. Minimum voltage is equal to -3.0V for pulse durations less than 30 ns.

2. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.

3. Tested initially and after any design or process changes that may affect these parameters.

AC Test Loads and Waveforms

OUTPUT

R1 4 81 W

OUTPUT

R1 481 W

A LL INPUT PULSE S

3.0V

9 0 %

10%

90%

30 pF

255

5 pF

255 W

10%

GND

INCLUDING

JIG AND

SCOPE

INCLUDING

JIG AND

SCOPE

< 5ns

(a)

(b)

CY6264-3

CY6264-4

Equivalent to:

THÉVENIN EQUIVALENT

OUTPUT

167

1.73V

Ambient Temperature with

Power Applied............................................. –55

T A = 25

PRELIMINARY

CY6264

Switching Characteristics Over the Operating Range [4]

6264-55

6264-70

Parameter

Description

Min.

Max.

Min.

Max.

Unit

READ CYCLE

t RC

Read Cycle Time

t AA

Address to Data Valid

t OHA

Data Hold from Address Change

t ACE1

CE 1 LOW to Data Valid

t ACE2

CE 2 HIGH to Data Valid

t DOE

OE LOW to Data Valid

t LZOE

OE LOW to Low Z

t HZOE

OE HIGH to High Z [5]

t LZCE1

CE 1 LOW to Low Z [6]

t LZCE2

CE 2 HIGH to Low Z

t HZCE

CE 1 HIGH to High Z [5, 6]

CE 2 LOW to High Z

t PU

CE 1 LOW to Power-Up

t PD

CE 1 HIGH to Power-Down

WRITE CYCLE [7]

t WC

Write Cycle Time

t SCE1

CE 1 LOW to Write End

t SCE2

CE 2 HIGH to Write End

t AW

Address Set-Up to Write End

t HA

Address Hold from Write End

t SA

Address Set-Up to Write Start

t PWE

WE Pulse Width

t SD

Data Set-Up to Write End

t HD

Data Hold from Write End

t HZWE

WE LOW to High Z [5]

t LZWE

WE HIGH to Low Z

Shaded area contains advanced information.

Notes:

4. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified

I OL /I OH and 30-pF load capacitance.

5. t HZOE, t HZCE , and t HZWE are specified with C L = 5 pF as in part (b) of AC Test Loads. Transition is measured ± 500 mV from steady-state voltage.

6. At any given temperature and voltage condition, t HZCE is less th an t L ZCE for any given devic e.

7. The internal write time of the memory is defined by the overlap of CE 1 LOW, CE 2 HIGH, and WE LOW. Both signals must be LOW to initiate a write and either

signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.

PRELIMINARY

CY6264

Switching Waveforms

Read Cycle No.1

[8, 9]

t RC

ADDRESS

t OHA

t AA

DATA OUT

PREVIOUS DATA VALID

DATA VALID

CY6264-5

Read Cycle No. 2

[10, 11]

CE 1

t RC

CE 2

t ACE

t DOE

t HZOE

t HZCE

t LZOE

HIGH

HIGH IMPEDANCE

IMPEDANC E

DATA OUT

DATA VALID

t LZCE

t PD

t PU

V CC

SUPPLY

CURRENT

ICC

50%

ISB

CY6264-6

Write Cycle No. 1 (W E Controlled)

[9, 11]

t WC

ADDRESS

t SCE1

CE 1

CE 2

t SCE2

t AW

t HA

t SA

t PWE

t SD

t HD

DATA IN

DATA IN VALID

t HZWE

t LZWE

DATA I/O

DATA UNDEFINED

HIGH IMPEDANCE

CY6264-7

Notes:

8. Device is continuously selected. OE, CE = V IL . CE 2 = V IH.

9. Add ress valid prior to or coincident with CE transition LOW.

10. WE is HIGH for read cy cle.

11. Data I/O is High Z if OE = V IH , CE 1 = V IH , or WE = V IL .

PRELIMINARY

CY6264

Switching Waveforms (continued)

Write Cycle No. 2 (CE Controlled)

[9, 11, 12]

t WC

ADDRE SS

CE 1

t SCE1

t SA

CE 2

t AW

t SCE2

t HA

t PWE

t SD

t HD

DATA IN

DATA IN VALID

t HZWE

DATA I/O

DATA UNDEFINED

HIGH IMPEDANCE

CY6264-8

Note:

12. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.

Typical DC and AC Characteristics

1.4

NORMALIZED SUPPLY CURRENT

vs. SUPPLY VOLTAGE

1.2

NORMALIZED SUPPLY CURRENT

vs. AMBIENT TEMPERATURE

120

OUTPUT SOURCE CURRENT

vs. OUT P UT VO L TAGE

1.2

1.0

100

I CC

1.0

0.8

V CC =5.0V

T A =25°C

0.6

0.4

V CC =5.0V

V IN =5.0V

0.2

I SB

0.2

I SB

0.0

4.0

4.5

5.0

5.5

6.0

- 55

125

0.0

1.0

2.0

3.0

4.0

SUPPLY VOLTAGE (V)

AMBIENT TEMPERATURE (°C)

OUTPUT VOLTAGE (V)

NORMALIZED ACCESS TIME

vs. SUP P LY VO L TAGE

NORMALIZED ACCESS TIME

vs. AMBIENT T EMPERATURE

OUTPUT SINK CURRENT

vs. OUT P UT VO L TAGE

1.4

1.6

140

1.3

1.4

120

100

1.2

V CC =5.0V

T A =25°C

1.2

1.1

T A =25°C

1.0

V CC =5.0V

0.9

0.8

0.6

4.0

4.5

5.0

5.5

6.0

- 55

125

0.0

1.0

2.0

3.0

4.0

SUPPLY VOLTAGE (V)

AMBIENT TEMPERATURE (°C)

OUTPUT VOLTAGE (V)

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