FDS6912.pdf

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323062180 UNPDF
July 2000
FDS6912
Dual N-Channel Logic Level PWM Optimized PowerTrench
MOSFET
General Description
Features
These N-Channel Logic Level MOSFETs have been
designed specifically to improve the overall efficiency of
DC/DC converters using either synchronous or
conventional switching PWM controllers.
6 A, 30 V.
R DS(ON) = 0.028
@ V GS = 10 V
R DS(ON) = 0.042
@ V GS = 4.5 V.
Optimized for use in switching DC/DC converters
with PWM controllers
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications.
Very fast switching.
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.
Low gate charge
D1
D1
5
4
D2
6
3
D2
Q1
7
2
SO-8
S1 G1
8
Q2
1
G2
S2
Absolute Maximum Ratings T A =25 o C unless otherwise noted
Symbol
Parameter
Ratings
Units
V DSS
Drain-Source Voltage
30
V
V GSS
Gate-Source Voltage
25
V
I D
Drain Current – Continuous
(Note 1a)
6
A
– Pulsed
20
P D
Power Dissipation for Dual Operation
2
W
Power Dissipation for Single Operation
(Note 1a)
1.6
(Note 1b)
1
(Note 1c)
0.9
T J , T stg
Operating and Storage Junction Temperature Range
-55 to +150
C
Thermal Characteristics
R θ
JA
Thermal Resistance, Junction-to-Ambient (Note 1a)
78
C/W
R θ
JC
Thermal Resistance, Junction-to-Case
(Note 1)
40
C/W
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS6912
FDS6912
13’’
12mm
2500 units
2000 Fairchild Semiconductor Corporation
FDS6912 Rev F (W)
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Electrical Characteristics
T A = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min Typ Max Units
Off Characteristics
BV DSS
Drain–Source Breakdown Voltage
V GS = 0 V, I D = 250
A
30
V
BV DSS
Breakdown Voltage Temperature
Coefficient
I D = 250
A, Referenced to 25
C
20
mV/
C
T J
I DSS
Zero Gate Voltage Drain Current
V DS = 24 V,
V GS = 0 V
1
10
A
T J = 55 °
C
I GSSF
Gate–Body Leakage, Forward
V GS = 25 V,
V DS = 0 V
100
nA
I GSSR
Gate–Body Leakage, Reverse
V GS = –25 V V DS = 0 V
–100
nA
On Characteristics (Note 2)
V GS(th)
Gate Threshold Voltage
V DS = V GS , I D = 250
A
1
2
3
V
V GS(th)
Gate Threshold Voltage
Temperature Coefficient
I D = 250 µ A, Referenced to 25 °
C
–5
mV/ °
C
T J
R DS(on)
Static Drain–Source
On–Resistance
V GS = 10 V, I D = 6 A
T J = 125
0.024
0.034
0.028
0.048
C
V GS = 4.5 V,
I D = 4.9 A
0.035 0.042
I D(on)
On–State Drain Current
V GS = 10 V,
V DS = 5 V
20
A
g FS
Forward Transconductance
V DS = 10 V,
I D = 6 A
20
S
Dynamic Characteristics
C iss
Input Capacitance
V DS = 15 V,
V GS = 0 V,
740
pF
C oss
Output Capacitance
f = 1.0 MHz
170
pF
C rss
Reverse Transfer Capacitance
75
pF
Switching Characteristics (Note 2)
t d(on)
Turn–On Delay Time
V DD = 15 V,
I D = 1 A,
8
16
ns
t r
Turn–On Rise Time
V GS = 10 V,
R GEN = 6
13
24
ns
t d(off)
Turn–Off Delay Time
18
29
ns
t f
Turn–Off Fall Time
8
16
ns
Q g
Total Gate Charge
V DS = 10 V,
I D = 6 A,
7
10
nC
Q gs
Gate–Source Charge
V GS = 5 V
3.8
nC
Q gd
Gate–Drain Charge
2.5
nC
Drain–Source Diode Characteristics and Maximum Ratings
I S
Maximum Continuous Drain–Source Diode Forward Current
1.3
A
V SD
Drain–Source Diode Forward
Voltage
V GS = 0 V, I S = 1.3 A (Note 2)
0.75
1.2
V
JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
JC is guaranteed by design while R
CA is determined by the user's board design.
a) 78°/W when
mounted on a 0.5in 2
pad of 2 oz copper
b) 125°/W when
mounted on a 0.02
in 2 pad of 2 oz
copper
c) 135°/W when mounted on a
minimum mounting pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
s, Duty Cycle < 2.0%
FDS6912 Rev E (W)
Notes:
1. R
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Typical Characteristics
30
2
6.0V
V = 10 V
GS
5.0V
4.5V
1.8
24
1.6
V GS = 4.0V
18
4.0V
1.4
4.5V
5.0V
12
3.5V
1.2
6.0V
7.0V
1
10V
6
3.0V
0.8
0
0
10
20
30
40
50
0
1
1
2
2
3
3
V ,D RAIN-SOUR CE VOLTAGE (V)
DS
I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
8
1.5
I = 6.3A
D
7
I = 3.0A
D
1.4
V =10V
GS
1.3
6
1.2
5
o
T = 125 C
A
1.1
1.0
4
0.9
3
0.8
2
25 o
0.7
0.6
1
-50
-25
0
25
50
75
100
125
150
2
4
6
8
10
T , JUNCTION TEMPERATURE (°C)
V ,GATE-SOURCE VOLTAGE (V)
J
GS
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
20
100
V = 5V
DS
T = -55°C
J
25°C
125°C
V GS = 0V
10
15
T A = 125 o C
1
25 o C
10
0.1
-55 o C
0.01
5
0.001
0.0001
0
0
0.4
0.8
1.2
1.6
1
2
3
4
5
V , GATE TO SOURCE VOLTAGE (V)
GS
V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6912 Rev E (W)
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Typical Characteristics (continued)
10
2000
I D = 6.3A
V DS = 5V
10V
8
C iss
15V
1000
6
500
4
C oss
2
200
f = 1 MHz
V = 0V
GS
C rss
0
80
0.1
0.3
1
3
1 0
30
0
4
8
12
16
Q g , GATE CHARGE (nC)
V , DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
30
25
SINGLE PULSE
R = 135°C/W
T = 25°
20
JA
10
A
20
2
15
0.5
10
V = 10V
SINGLE PULSE
R = 135 °C/W
T = 25°C
GS
0.05
JA
5
A
0.01
0 0.01 0.1
0.1
0.2
0.5
1
2
5
10
20
1
10 100 1000
V , DRAIN-SOURCE VOLTAGE (V)
DS
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.5
D = 0.5
0.2
0.2
R (t) = r(t) * R
R = 135°C/W θ
JA
θ
JA
0.1
0.1
0.05
0.02
0.01
JA
0.05
0.02
P(pk)
0.01
Single Pulse
t 1
t 2
0.005
T - T = P * R (t)
θ
A
JA
0.002
Duty Cycle, D = t /t
1 2
0.0001
0.001
0.01
0.1
1
10
100
300
t , TIME (sec)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6912 Rev E (W)
J
0.001
1
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT ™
DenseTrench™
DOME™
EcoSPARK™
E 2 CMOS TM
EnSigna TM
FACT™
FACT Quiet Series™
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
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UHC™
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VCX™
STAR*POWER is used under license
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
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Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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