4027.pdf

HCC/HCF4027B

. SET-RESET CAPABILITY

DUAL-J-K MASTER-SLAVE FLIP-FLOP

. STATIC FLIP-FLOP OPERATION - RETAINS

. MEDIUM SPEED OPERATION - 16MHz (typ.

clock toggle rate at 10V)

. STANDARDIZED SYMMETRICAL OUTPUT

. QUIESCENT CURRENT SPECIFIED TO 20V

FOR HCC DEVICE

CHARACTERISTICS

(Plastic Package)

(Ceramic Frit Seal Package)

. INPUT CURRENT OF 100nA AT 18V AND 25 ° C

. 100% TESTED FOR QUIESCENT CURRENT

. MEETS ALL REQUIREMENTS OF JEDEC TEN-

(Micro Package )

(Plastic Chip Carrier)

TATIVE STANDARD N 0 . 13A, ”STANDARD

SPECIFICATIONS FOR DESCRIPTION OF ”B”

SERIES CMOS DEVICES”.

ORDER CODES :

HCC4027BF

HCF4027BM1

HCF4027BEY

HCF4027BC1

PIN CONNECTIONS

DESCRIPTION

The HCC4027B (extended temperature range) and

HCF4027B (intermediate temperature range) are

monolithic integrated circuit, available in 16-lead

dual in-line plastic or ceramic package and plastic

micro package.

The HCC/HCF4027B is a single monolithic chip in-

tegrated circuit containing two identical complemen-

tary-symmetry J-K master-slave flip-flops. Each

flip-flop has provisions for individual J, K, Set, Reset,

and Clock input signals, Buffered Q and Q signals

are provided as outputs. This input-output arrange-

ment provides for compatible operation with the

HCC/HCF4013B dual D-type flip-flop.

The HCC/HCF4027B is useful in performing control,

at the J and K inputs along with internal self-steering

control the state of each flip-flop ; changes in the flip-

flop state are synchronous with the positive-going

transition of the clock pulse. Set and reset functions

are independent of the clock and are initiated when

a high level signal is present at either the Set or

Reset input.

June 1989

1/12

STATE INDEFINITELY WITH CLOCK LEVEL

EITHER ”HIGH” OR ”LOW”

FOR HCC DEVICE

HCC/HCF4027B

FUNCTIONAL DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

V DD *

Supply Voltage : HCC Types

HCF Types

– 0.5 to + 20

– 0.5 to + 18

V i

Input Voltage

– 0.5 to V DD + 0.5

I I

DC Input Current (any one input)

P tot

Total Power Dissipation (per package)

Dissipation per Output Transistor

for T op = Full Package-temperature Range

200

100

T op

Operating Temperature : HCC Types

HCF Types

– 55 to + 125

–40to+85

T stg

Storage Temperature

– 65 to + 150

Stresses above those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only

and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification

is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.

* All voltage values are referred to V SS pin voltage .

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Value

Unit

V DD

Supply Voltage : HCC Types

HCF Types

3to18

3to15

V I

Input Voltage

0 to V DD

T op

Operating Temperature : HCC Types

HCF Types

– 55 to + 125

–40to+85

2/12

HCC/HCF4027B

LOGIC DIAGRAM AND TRUTH TABLE

ONE OF TWO IDENTICAL J-K FLIP-FLOPS

TRUTH TABLE

Present State

CL D

Next State

Inputs

Output

Outputs

–

OOO

–

– \ –

No Change

O I

LOGIC I = HIGH LEVEL

LOGIC O = LOW LEVEL

3/12

- LEVEL CHANGE

X - DON’T CARE

HCC/HCF4027B

STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions)

Test Conditions

Value

Symbol

Parameter

V I

V O

|I O |V DD

T Low *

T Hi g h *

Unit

(V)

(

A) (V)

Min. Max. Min. Typ. Max. Min. Max.

I L

Quiescent

Current

0/ 5

0.02

HCC

Types

0/10

0.02

0/15

0.02

120

0/20

0.04 20

600

0/ 5

0.02

HCF

Types

0/10

0.02

0/15

0.02 16

120

V OH

Output High

Voltage

0/ 5

< 1

4.95

0/10

< 1 10 9.95

9.95

0/15

< 1 15 14.95

14.95

V OL

Output Low

Voltage

5/0

< 1

0.05

10/0

< 1 10

0.05

15/0

< 1 15

0.05

V IH

Input High

Voltage

0.5/4.5 < 1

3.5

1/9

< 1 10

1.5/13.5 < 1 15

V IL

Input Low

Voltage

4.5/0.5 < 1

1.5

9/1

< 1 10

13.5/1.5 < 1 15

I OH

Output

Drive

Current

0/ 5

2.5

– 2

– 1.6 – 3.2

– 1.15

HCC

Types

0/ 5

4.6

5 – 0.64

– 0.51 – 1

– 0.36

0/10

9.5

10 – 1.6

– 1.3 – 2.6

– 0.9

0/15 13.5

15 – 4.2

– 3.4 – 6.8

– 2.4

0/ 5

2.5

5 – 1.53

– 1.36 – 3.2

– 1.1

HCF

Types

0/ 5

4.6

5 – 0.52

– 0.44 – 1

– 0.36

0/10

9.5

10 – 1.3

– 1.1 – 2.6

– 0.9

0/15 13.5

15 – 3.6

– 3.0 – 6.8

– 2.4

I OL

Output

Sink

Current

0/ 5

0.4

0.64

0.51

0.36

HCC

Types

0/10

0.5

1.6

1.3

2.6

0.9

0/15

1.5

4.2

3.4

6.8

2.4

0/ 5

0.4

0.52

0.44

0.36

HCF

Types

0/10

0.5

1.3

1.1

2.6

0.9

0/15

1.5

3.6

3.0

6.8

2.4

I IH ,I IL Input

Leakage

Current

HCC

Types

0/18

0.1

10 –5

0.1

Any Input

HCF

Types

0/15

0.3

10 –5

0.3

C I

Input Capacitance

Any Input

7.5

*T Low =– 55

Cfor HCC device : – 40

C for HCF device.

The Noise Margin for both ”1” and ”0” level is : 1V min. with V DD = 5V, 2V min. with V DD = 10V, 2.5 V min. with V DD = 15V.

C for HCC device : + 85

4/12

*T High = + 125

HCC/HCF4027B

DYNAMIC ELECTRICAL CHARACTERISTICS (T amb =25

C, C L = 50pF, R L = 200k

typical temperature coefficient for all V DD = 0.3%/

C values, all input rise and fall time = 20ns)

Symbol

Parameter

Test Conditions

Value

Unit

V DD (V) Min. Typ. Max.

t PLH ,t PHL Propagation

Delay Time

Clock to Q or Q

Outputs

150

300

130

t PLH

Propagation

Delay Time

Set to Q or Reset

to Q

150

300

130

t PHL

Propagation

Delay Time

Set to Q or Reset

to Q

200

400

170

120

t THL ,t TLH Transition Time

100

200

100

t W

Pulse Width

Clock

140

t W

Pulse Width

Set or Reset

180

t r ,t f

Clock Input Rise

or Fall Time

t se tu p

Setup Time

Data

200

100

f max

Maximum

Clock Input

Frequency *

Toggle Mode

3.5

MHz

* Input tr, tf = 5ns.

5/12

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