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<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
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Compal Confidential
2
2
ICL50/51, ICK70/71 Schematics Document
Intel Merom Processor with Crestline(PM965/GM965) + DDRII + ICH8M
(With ATI MXM/B)
2007-8-15
3
3
REV:2.0
4
4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Security Classification
Security Classification
Security Classification
2007/04/04
2007/04/04
2007/04/04
2008/04/04
2008/04/04
2008/04/04
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
Cover Page
Cover Page
Cover Page
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
B
B
B
ICL50/ICK70 M/B LA-3551P Schemati
1.0
ICL50/ICK70 M/B LA-3551P Schemati
1.0
ICL50/ICK70 M/B LA-3551P Schemati
1.0
Date:
Date:
Date:
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Sheet
Sheet
Sheet
1
1
1
of
of
of
49
49
49
A
B
C
D
E
A
B
C
D
E
Compal Confidential
Intel Merom Processor
Thermal Sensor
Clock Generator
ICS9LPRS365
Fan Control
Model Name : ICL50/51, ICK70/ICK71
page 36
ADM1032
uPGA-478 Package
File Name : LA-3551P
page 4
page 16
(Socket P)
page 4,5,6
1
FSB
1
H_A#(3..35)
667/800MHz
H_D#(0..63)
DVI-D Conn.
LCD Conn.
CRT & TV-out
page 18
page 18
page 19
Memory BUS(DDRII)
Intel Crestline
200pin DDRII-SO-DIMM X2
LVDS
Dual Channel
LVDS
SDVO
BANK 0, 1, 2, 3
page 14,15
DVI
uFCBGA-1299
1.8V DDRII 533/667
PCI-Express
page 7,8,9,10,11,12,13
MXM II VGA/B
DMI
C-Link
USB conn x2
Bluetooth
Conn
CMOS
Camera
page 17
USB port 0, 2
PCI-Express
Intel ICH8-M
2
3.3V 48MHz
USB
2
PCI BUS
3.3V 24.576MHz/48Mhz
HD Audio
3.3V 33 MHz
3.3V ATA-100
IDE
BGA-676
IDSEL:AD20
(PIRQA#,
GNT#2,
REQ#2)
New Card
Socket
MINI Card x2
LAN(GbE)
BCM5787M
page 26
S-ATA
page 20,21,22,23
WLAN, TV-Tuner
CDROM
Conn.
MDC 1.5
Conn
HDA Codec
Card Reader
ALC268
page 29
page 28
port 0, 1
page 24
page 33
page 34
R5C833
page 25
SATA HDD
Conn.
RJ45
page 26
1394
Conn.
5 in 1
socket
page 25
page 24
Audio AMP
page 35
LPC BUS
page 25
3
Phone Jack x3
3
ENE KB926
BTN/B Conn.
RTC CKT.
page 33
page 35
page 30
page 32
LED/B Conn.
Touch Pad
Int.KBD
Power On/Off CKT.
page 32
page 32
page 32
page 33
EC I/O Buffer
BIOS
USB&TV/B Conn.
DC/DC Interface CKT.
page 32
page 32
USB port 4, 6
page 37
page 29
CIR
Power Circuit DC/DC
AUDIO/B Conn.
w/Woofer(ICK70)
page 29
page 38,39,40,41
42,43,44,45
4
4
page 35
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Security Classification
Security Classification
Security Classification
2006/12/25
2006/12/25
2006/12/25
2007/12/25
2007/12/25
2007/12/25
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
Block Diagrams
Block Diagrams
Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
B
B
B
ICL50/ICK70 M/B LA-3551P Schemati
1.0
ICL50/ICK70 M/B LA-3551P Schemati
1.0
ICL50/ICK70 M/B LA-3551P Schemati
1.0
Date:
Date:
Date:
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Sheet
Sheet
Sheet
2
2
2
of
of
of
49
49
49
A
B
C
D
E
A
B
C
D
E
SIGNAL
STATE
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW
+V
+VS
Clock
Voltage Rails
Full ON
S1(Power On Suspend)
HIGH
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
ON
ON
Power Plane
Description
S1
S3
S5
LOW
HIGH
HIGH
ON
LOW
VIN
B+
+CPU_CORE
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU
N/A
N/A
N/A
N/A
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
N/A
N/A
S4 (Suspend to Disk)
S5 (Soft OFF)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
OFF
OFF
OFF
1
ON
OFF
OFF
1
+0.9VS
0.9V switched power rail for DDR terminator
ON
OFF
OFF
LOW
LOW
LOW
LOW
ON
+1.05VS
1.05V switched power rail
ON
OFF
OFF
+1.25VS
1.25V switched power rail
ON
OFF
OFF
Board ID / SKU ID Table for AD channel
+1.5VS
1.5V switched power rail
ON
OFF
OFF
+1.8V
ON
ON
Vcc
3.3V +/- 5%
100K +/- 5%
1.8V power rail for DDR
OFF
+1.8VS
1.8V switched power rail
ON
Ra/Rc/Re
Board ID
OFF
OFF
+2.5VS
ON
Rb / Rd / Rf
V
min
V
typ
V
AD_BID
max
2.5V switched power rail
OFF
OFF
AD_BID
AD_BID
+3VALW
ON
ON
ON*
3.3V always on power rail
0
1
2
3
0
8.2K +/- 5%
0 V
0.216 V
0 V
0 V
+3V
+3V_LAN
3.3V power rail for SB
3.3V power rail for LAN
ON
ON
X
X
0.250 V
0.289 V
ON
ON
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
0.436 V
0.712 V
0.503 V
0.819 V
0.538 V
0.875 V
+3VS
+5VALW
3.3V switched power rail
ON
OFF
OFF
5V always on power rail
ON
ON
ON*
4
5
6
7
1.036 V
1.453 V
1.185 V
1.264 V
+5VS
5V switched power rail
ON
OFF
OFF
1.650 V
1.759 V
+VSB
VSB always on power rail
ON
ON
ON
ON*
ON
1.935 V
2.500 V
2.200 V
3.300 V
2.341 V
+RTCVCC
RTC power
ON
NC
3.300 V
2
2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table
BTO Option Table
External PCI Devices
Device
Board ID
0
1
2
3
4
5
6
7
PCB Revision
0.1
BTO Item
BOM Structure
PM@
GM@
Discrete
Interrupts
IDSEL#
REQ#/GNT#
0.2
0.3
1.0
1A(Nettiling)
1A(Acadia 960)
UMA
1394/Card Reader
AD16
0
PIRQE
PIRQG
EC SM Bus1 address
EC SM Bus2 address
3
Device
Address
Device
Address
3
Smart Battery
ADI ADM1032
0001 011X b
1010 000X b
1001 100X b
EEPROM(24C16/02)
GMT G781-1
1001 101X b
ICH8M SM Bus address
Device
Address
Clock Generator
(ICS9LPRS365)
1101 001Xb
DDR DIMM0
1001 000Xb
DDR DIMM2
1001 010Xb
4
4
Compal Secret Data
Compal Secret Data
Compal Secret Data
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Security Classification
Security Classification
Security Classification
2006/12/25
2006/12/25
2006/12/25
2007/12/25
2007/12/25
2007/12/25
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
Notes List
Notes List
Notes List
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
B
B
B
ICL50/ICK70 M/B LA-3551P Schemati
1.0
ICL50/ICK70 M/B LA-3551P Schemati
1.0
ICL50/ICK70 M/B LA-3551P Schemati
1.0
Date:
Date:
Date:
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Sheet
Sheet
Sheet
3
3
3
of
of
of
49
49
49
A
B
C
D
E
5
4
3
2
1
H_A#[3..35]
H_REQ#[0..4]
H_RS#[0..2]
7
H_A#[3..35]
7
H_REQ#[0..4]
7
H_RS#[0..2]
JP22A
JP22A
H_A#3
J4
H1
H_ADS#
7
A[3]#
ADS#
H_A#4
L5
E2
A[4]#
BNR#
H_BNR#
7
H_A#5
L4
G5
D
D
A[5]#
BPRI#
H_BPRI#
7
H_A#6
K5
A[6]#
H_A#7
H_A#9
H_A#10
H_A#12
M3
H5
H_DEFER#
7
A[7]#
DEFER#
H_A#8
N2
F21
H_DRDY#
7
A[8]#
DRDY#
J1
E1
H_DBSY#
7
A[9]#
DBSY#
N3
A[10]#
H_A#11
P5
F1
H_BR0#
7
A[11]#
BR0#
P2
A[12]#
H_A#13
H_IERR#
L2
D20
A[13]#
IERR#
H_A#14
P4
B3
H_INIT#
21
A[14]#
INIT#
H_A#15
P1
A[15]#
H_A#16
R1
H4
H_LOCK#
7
A[16]#
LOCK#
M1
7
H_ADSTB#0
ADSTB[0]#
H_RESET#
C1
H_RESET#
7
RESET#
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#4
H_RS#0
H_RS#2
K3
F3
REQ[0]#
RS[0]#
H_RS#1
H2
F4
REQ[1]#
RS[1]#
K2
G3
REQ[2]#
RS[2]#
H_REQ#3
J3
G2
H_TRDY#
7
REQ[3]#
TRDY#
L1
REQ[4]#
G6
HIT#
H_HIT#
7
H_A#17
Y2
E4
A[17]#
HITM#
H_HITM#
7
H_A#18
H_A#19
H_A#20
H_A#22
U5
A[18]#
R3
AD4
A[19]#
BPM[0]#
W6
AD3
A[20]#
BPM[1]#
H_A#21
H_A#23
H_A#24
H_A#26
U4
AD1
A[21]#
BPM[2]#
Y5
AC4
A[22]#
BPM[3]#
U1
AC2
A[23]#
PRDY#
R4
AC1
XDP_BPM#5
A[24]#
PREQ#
H_A#25
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
T5
AC5
XDP_TCK
A[25]#
TCK
C
XDP_TDI
XDP_TMS
C
T3
AA6
A[26]#
TDI
W2
AB3
A[27]#
TDO
W5
AB5
A[28]#
TMS
XDP_TRST#
Y4
AB6
A[29]#
TRST#
XDP_DBRESET#
U2
C20
XDP_DBRESET#
22
A[30]#
DBR#
V4
A[31]#
+1.05VS
H_A#32
H_A#33
H_A#34
H_A#35
W3
A[32]#
THERMAL
THERMAL
AA4
A[33]#
AB2
A[34]#
H_PROCHOT#
AA3
D21
A[35]#
PROCHOT#
THERMDA
THERMDC
V1
A24
7
H_ADSTB#1
ADSTB[1]#
THERMDA
XDP_TDI
R59
R59
150_0402_1%
150_0402_1%
B25
1
2
THERMDC
A6
21
H_A20M#
A20M#
A5
C7
left NC if no ITP
39Ohm
H_THERMTRIP#
8,21
21
H_FERR#
FERR#
THERMTRIP#
C4
21
H_IGNNE#
IGNNE#
XDP_TMS
R63
R63
39_0402_1%
39_0402_1%
1
2
D5
21
H_STPCLK#
STPCLK#
XDP_BPM#5
R46
R46
@
@
54.9_0402_1%
54.9_0402_1%
C6
H CLK
H CLK
1
2
21
H_INTR
LINT0
B4
A22
21
H_NMI
LINT1
BCLK[0]
CLK_CPU_BCLK
16
A3
A21
21
H_SMI#
SMI#
BCLK[1]
CLK_CPU_BCLK#
16
M4
H_PROCHOT#
R114
R114
2
1
56_0402_5%
56_0402_5%
RSVD[01]
N5
RSVD[02]
T2
H_IERR#
R113
R113
2
1
56_0402_5%
56_0402_5%
RSVD[03]
V3
RSVD[04]
Layout Note:
THERMDA&THERMDC Trace / Space = 10 / 10 mil
B2
RSVD[05]
C3
RSVD[06]
D2
RSVD[07]
THERMDA_R&THERMDC_R Trace / Space = 10 / 10 mil
D22
RSVD[08]
B
B
XDP_TRST#
R57
R57
649_0402_1%
649_0402_1%
D3
2
1
RSVD[09]
F6
RSVD[10]
XDP_TCK
R37
R37
27_0402_5%
27_0402_5%
1
2
Merom Ball-out Rev 1a
CONN@
Merom Ball-out Rev 1a
CONN@
+3VS
C485
0.1U_0402_16V4Z
1
2
BSEL2
BSEL1
BSEL0
BCLK
200
THERMDA
1
2
R546
R546
0_0402_5%
0_0402_5%
U21
U21
0
1
0
1
8
VDD
SCLK
EC_SMB_CK2
30
1
C484
2200P_0402_50V7K
THERMDA_R
2
7
EC_SMB_DA2
30
D+
SDATA
0
1
1
166
THERMDC_R
3
6
2
D-
ALERT#
4
5
THERM#
GND
THERMDC
1
2
R547
R547
0_0402_5%
0_0402_5%
ADM1032ARMZ_MSOP8
ADM1032ARMZ_MSOP8
A
A
For Next Generation CUP (45nm)
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
2006/12/25
2006/12/25
2006/12/25
2007/12/25
2007/12/25
2007/12/25
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
Merom (1/3)
Merom (1/3)
Merom (1/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
B
B
B
ICL50/ICK70 M/B LA-3551P Schematic
ICL50/ICK70 M/B LA-3551P Schematic
ICL50/ICK70 M/B LA-3551P Schematic
1.0
1.0
1.0
Date:
Date:
Date:
Sheet
Sheet
Sheet
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Wednesday, August 15, 2007
4
4
4
of
of
of
49
49
49
5
4
3
2
1
5
4
3
2
1
H_D#[0..63]
JP22C
JP22C
H_D#[0..63]
7
A7
AB20
+CPU_CORE
VCC[001]
VCC[068]
+CPU_CORE
JP22B
JP22B
A9
AB7
VCC[002]
VCC[069]
H_D#0
H_D#32
H_D#34
H_D#35
H_D#37
H_D#39
E22
Y22
A10
AC7
D[0]#
D[32]#
VCC[003]
VCC[070]
H_D#1
H_D#3
F24
AB24
H_D#33
A12
AC9
D
D
D[1]#
D[33]#
VCC[004]
VCC[071]
H_D#2
E26
V24
A13
AC12
D[2]#
D[34]#
VCC[005]
VCC[072]
G22
V26
A15
AC13
D[3]#
D[35]#
VCC[006]
VCC[073]
H_D#4
F23
V23
H_D#36
A17
AC15
D[4]#
D[36]#
VCC[007]
VCC[074]
H_D#5
H_D#6
G25
T22
A18
AC17
D[5]#
D[37]#
VCC[008]
VCC[075]
H_D#38
E25
U25
A20
AC18
D[6]#
D[38]#
VCC[009]
VCC[076]
H_D#7
E23
U23
B7
AD7
D[7]#
D[39]#
VCC[010]
VCC[077]
H_D#8
H_D#10
H_D#11
H_D#40
K24
Y25
B9
AD9
D[8]#
D[40]#
VCC[011]
VCC[078]
H_D#9
H_D#41
G24
W22
B10
AD10
D[9]#
D[41]#
VCC[012]
VCC[079]
H_D#42
J24
Y23
B12
AD12
D[10]#
D[42]#
VCC[013]
VCC[080]
H_D#43
J23
W24
B14
AD14
D[11]#
D[43]#
VCC[014]
VCC[081]
H_D#12
H_D#14
H_D#44
H22
W25
B15
AD15
D[12]#
D[44]#
VCC[015]
VCC[082]
H_D#13
H_D#45
H_D#46
H_D#47
F26
AA23
B17
AD17
D[13]#
D[45]#
VCC[016]
VCC[083]
K22
AA24
B18
AD18
D[14]#
D[46]#
VCC[017]
VCC[084]
H_D#15
H23
AB25
B20
AE9
D[15]#
D[47]#
VCC[018]
VCC[085]
J26
Y26
C9
AE10
7
H_DSTBN#0
DSTBN[0]#
DSTBN[2]#
H_DSTBN#2
7
VCC[019]
VCC[086]
H26
AA26
C10
AE12
7
H_DSTBP#0
DSTBP[0]#
DSTBP[2]#
H_DSTBP#2
7
VCC[020]
VCC[087]
H25
U22
C12
AE13
7
H_DINV#0
DINV[0]#
DINV[2]#
H_DINV#2
7
VCC[021]
VCC[088]
C13
AE15
VCC[022]
VCC[089]
C15
AE17
VCC[023]
VCC[090]
H_D#16
H_D#17
H_D#19
H_D#48
N22
AE24
C17
AE18
D[16]#
D[48]#
VCC[024]
VCC[091]
H_D#49
H_D#50
K25
AD24
C18
AE20
D[17]#
D[49]#
VCC[025]
VCC[092]
H_D#18
P26
AA21
D9
AF9
D[18]#
D[50]#
VCC[026]
VCC[093]
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
R23
AB22
D10
AF10
D[19]#
D[51]#
VCC[027]
VCC[094]
H_D#20
L23
AB21
D12
AF12
D[20]#
D[52]#
VCC[028]
VCC[095]
H_D#21
M24
AC26
D14
AF14
D[21]#
D[53]#
VCC[029]
VCC[096]
H_D#22
L22
AD20
D15
AF15
D[22]#
D[54]#
VCC[030]
VCC[097]
H_D#23
M23
AE22
D17
AF17
D[23]#
D[55]#
VCC[031]
VCC[098]
H_D#24
H_D#25
P25
AF23
H_D#56
H_D#57
H_D#59
D18
AF18
D[24]#
D[56]#
VCC[032]
VCC[099]
C
C
P23
AC25
E7
AF20
D[25]#
D[57]#
VCC[033]
VCC[100]
+1.05VS
H_D#26
H_D#28
H_D#58
H_D#60
H_D#62
P22
AE21
E9
D[26]#
D[58]#
VCC[034]
H_D#27
T24
AD21
E10
G21
D[27]#
D[59]#
VCC[035]
VCCP[01]
+1.05VS
R24
AC22
E12
V6
D[28]#
D[60]#
VCC[036]
VCCP[02]
H_D#29
H_D#61
H_D#63
L25
AD23
E13
J6
D[29]#
D[61]#
VCC[037]
VCCP[03]
H_D#30
H_D#31
T25
AF22
E15
K6
D[30]#
D[62]#
VCC[038]
VCCP[04]
R366
1K_0402_1%
N25
AC23
E17
M6
D[31]#
D[63]#
VCC[039]
VCCP[05]
L26
AE25
E18
J21
7
H_DSTBN#1
H_DSTBN#3
7
DSTBN[1]#
DSTBN[3]#
VCC[040]
VCCP[06]
M26
AF24
E20
K21
7
H_DSTBP#1
DSTBP[1]#
DSTBP[3]#
H_DSTBP#3
7
VCC[041]
VCCP[07]
N24
AC20
F7
M21
7
H_DINV#1
DINV[1]#
DINV[3]#
H_DINV#3
7
VCC[042]
VCCP[08]
Trace Close CPU < 0.5'
F9
N21
VCC[043]
VCCP[09]
GTL_REF0
TEST1
TEST2
TEST4
COMP0
R376
R376
27.4_0402_1%
27.4_0402_1%
AD26
R26
1
2
F10
N6
GTLREF
COMP[0]
VCC[044]
VCCP[10]
Width=4 mil ,
Spacing: 15mil
(55Ohm)
R378
R378
@
@
1K_0402_5%
1K_0402_5%
MISC
MISC
COMP1
R375
R375
54.9_0402_1%
54.9_0402_1%
2
1
C23
U26
1
2
F12
R21
TEST1
COMP[1]
VCC[045]
VCCP[11]
R377
R377
@
@
1K_0402_5%
1K_0402_5%
COMP2
R54
R54
27.4_0402_1%
27.4_0402_1%
2
1
D25
AA1
1
2
F14
R6
TEST2
COMP[2]
VCC[046]
VCCP[12]
TEST3
TEST5
TEST6
COMP3
R56
R56
54.9_0402_1%
54.9_0402_1%
C24
Y1
1
2
F15
T21
PAD
PAD
T17
T17
TEST3
COMP[3]
VCC[047]
VCCP[13]
R369
2K_0402_1%
C444
C444
@
@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
AF26
F17
T6
TEST4
VCC[048]
VCCP[14]
@
@
AF1
E5
F18
V21
PAD
PAD
T15
T15
TEST5
DPRSTP#
H_DPRSTP# 8,21,45
H_DPSLP# 21
H_DPWR# 7
H_PWRGOOD
VCC[049]
VCCP[15]
A26
B5
F20
W21
PAD
PAD
T16
T16
TEST6
DPSLP#
VCC[050]
VCCP[16]
@
@
D24
AA7
20mils
DPWR#
VCC[051]
H_PWRGOOD
H_CPUSLP#
@
@
B22
D6
AA9
B26
16
CPU_BSEL0
+1.5VS
BSEL[0]
PWRGOOD
21
VCC[052]
VCCA[01]
B23
D7
AA10
C26
16
CPU_BSEL1
BSEL[1]
SLP#
H_CPUSLP#
7
VCC[053]
VCCA[02]
C21
AE6
AA12
1
1
16
CPU_BSEL2
BSEL[2]
PSI#
PSI#
45
VCC[054]
AA13
AD6
C1
53
0.01U_0402_16V7K
C148
C148
VCC[055]
VID[0]
CPU_VID0
45
Merom Ball-out Rev 1a
CONN@
Merom Ball-out Rev 1a
CONN@
AA15
AF5
CPU_VID1
45
VCC[056]
VID[1]
AA17
AE5
CPU_VID2
45
VCC[057]
VID[2]
2
2
TRACE CLOSELY CPU < 0.5'
AA18
AF4
CPU_VID3
45
VCC[058]
VID[3]
AA20
AE3
CPU_VID4
45
VCC[059]
VID[4]
COMP0, COMP2 layout : Width 18mils and Space 25mils (27.4Ohms)
COMP1, COMP3 layout : Width 4mils and Space 25mils (55Ohms)
10U_0805_10V4Z
10U_0805_10V4Z
AB9
AF3
CPU_VID5
45
VCC[060]
VID[5]
AC10
AE2
CPU_VID6
45
VCC[061]
VID[6]
B
B
AB10
1
2
+CPU_CORE
VCC[062]
R20
R20
100_0402_1%
100_0402_1%
AB12
VCC[063]
VCCSENSE
AB14
AF7
VCCSENSE
45
VCC[064]
VCCSENSE
AB15
VCC[065]
AB17
VCC[066]
VSSSENSE
AB18
AE7
VSSSENSE
45
VCC[067]
VSSSENSE
Merom Ball-out Rev 1a
Merom Ball-out Rev 1a
R21
R21
100_0402_1%
100_0402_1%
1
2
CONN@
CONN@
.
.
A
A
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Security Classification
Security Classification
Security Classification
Compal Secret Data
Compal Secret Data
Compal Secret Data
2006/12/25
2006/12/25
2006/12/25
2007/12/25
2007/12/25
2007/12/25
Title
Title
Title
Issued Date
Issued Date
Issued Date
Deciphered Date
Deciphered Date
Deciphered Date
Merom (2/3)
Merom (2/3)
Merom (2/3)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Size
Size
Document Number
Document Number
Document Number
Rev
Rev
Rev
B
B
B
ICL50/ICK70 M/B LA-3551P Schematic
ICL50/ICK70 M/B LA-3551P Schematic
ICL50/ICK70 M/B LA-3551P Schematic
1.0
1.0
1.0
Date:
Date:
Date:
Sheet
Sheet
Sheet
Wednesday, August 15, 2007
Wednesday, August 15, 2007
Wednesday, August 15, 2007
5
5
5
of
of
of
49
49
49
5
4
3
2
1
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