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000131-UK S/PDIF output
AUD
IO
S/PDIF Output
For OSCAR and other digital audio-equipment
Design by T. Giesberts
The standard MP3 CD player is not provided with an S/PDIF-output that
would have enabled the transmission of digital audio signals to other
equipment. With the aid of this circuit, designed around an IC from
Crystal, an optical and coaxial S/PDIF signal is generated from a kind of
I
2
S signal in the OSCAR MP3-player.
Althoiugh the OSCAR MP3 player is
fitted with analogue audio outputs
that may be connected to other hi-fi
equipment or the line input of a
sound card, it would be easier and
less lossy to transfer the signal in
digital form to another piece of
equipment with digital input, espe-
cially when recording tracks using,
for instance, a DAT- or MD-recorder.
As standard, OSCAR does not
possess an output that provides a
digital audio signal in usable form.
However, on the main circuit board
is a connection that provides digital
audio data in a ‘raw’ format. This
signal must first be correctly
encoded with additional information
bits and then transmitted with the
correct bi-phase modulation and
amplitude.
The CS8402A from Crystal is an
IC that can do all these tasks by
itself, hence the name ‘digital audio
interface transmitter’. Around this IC
is some circuitry that translates the
‘raw’ signal from OSCAR to S/PDIF.
In the first instance, this circuit
was designed for use with OSCAR,
however it is universally applicable
because almost all the hardware
modes of the CS8402A are available
to be selected. Two DIP switches
and two jumpers enable the circuit
to support various formats.
28
Elektor Electronics
10/2000
AUD
IO
The CS8402 has already appeared
in various projects (such as the Sam-
pling Rate Converter from October
’96, 20-bit A/D Converter from
December ’96 and the S/PDIF Test
Generator from July/August ’99), so
we will limit ourselves to the most
important aspects. In any case, to
enable a better insight into the over-
all functionality of the IC,
Figure 1
shows once again the block diagram
of the CS8402A. Additional informa-
tion can be found on the Cirrus Logic
web site.
M
2
M
1
M
0
23 22 21
8
6
7
SDATA
SCK
FSYNC
Serial
Port
Logic
Audio
Aux
20
Biphase
Mark
Encoder
C
U
V
10
11
9
C Bits
Mux
Line
Driver
TXP
TXN
Registers
17
CRC
*
U Bits
Validity
Timing
16
RST
Preamble
*
Parity
The circuit
3441342
FC0 FC1 C2 C3 C8 C9 C15
(L)PRO C1 TRNPT C6 C7 EM1 EM0 C9
15 5
CBL MCK
*
professional mode only
000131-12
In
Figure 2
you can see the entire
schematic for the converter circuit.
As previously mentioned, the
CS8402A takes care of the complete
conversion from raw audio data to
S/PDIF. Besides the TOSLINK module
for the optical output, the only other
active elements are two HCT logic
ICs (dual D flip-flops).
The master clock signal MCK for
the CS8402A arrives at pin 3 of K1 (or
Figure 1. Internal architecture of the CS8402A.
on the PCB pin of the same name). It
is then routed via header JP1 to pin 5
of IC1. To make the circuit as univer-
sally applicable as possible, two
divide-by-two circuits (IC2a and
IC2b) are connected to pin 3 of K1.
Normally (when transparent mode is
not selected) the master clock MCK amounts
to 128?Fs. Because of the presence of the
divide-by-twos MCK may also take the values
of 256?Fs or 512?Fs. This is selectable with
Jumper 1 (JP1). The divisors /4, /2 and /1 can
be seen next to JP1 on the PCB overlay. The
latter connects the MCK input of the CS8402A
5V
5V
IC4
R8
4
Ω
7
TOTX173
3
R7
8k2
10
3
R
4
1
S2
432
1
S1
12
10
9
11
13
14
15
16
2
4
L1
R2
S
S
R
C4
12
9
2
5
D
D
IC2b
IC2a
100n
1
OPTO
11
C
8
3
C
6
47µH
5
6
7
8
5786
4321
C6
C5
K2
R4
75
Ω
100n
47µ
25V
TR1
3
JP1
MCK
R3
COAX
1
2
÷ 4
IC1
19
MCK
3
4
÷ 2
4
1
5
6
÷ 1
5
20
17
C2
MCK
TXP
TXN
8
7
SDATA
FSYNC
47n
K1
5V
9
10
6
SCK
PRO
2
3
R6
75
Ω
K3
FSYNC
C1/FC0
7
8
21
2
5
M0
24
TRNPT/FC1
5
6
22
M1
4
R5
COAX
3
4
23
C6/C2
M2
1
1
2
2
5
C7/C3
D
6
15
13
14
12
20 : 2 : 2
IC3a
CBL/SBC
EM1/C8
EM0/C9
C9/C15
C3
3
6
C
9
V
47n
S
R
10
11
C/SBF
4
1
16
5V
U
RST
5V
SDATA
10
13
JP2
5
4
3
2
23456789
18
S
R
14
14
CS8402A
SCK
12
D
9
C1
IC2
C7
IC3
C8
IC3b
SCK
SCK
22µ
40V
7
100n
7
100n
11
8
C
R9
1
4x 10k
R1
1
8x 10k
IC2, IC3 = 74HCT74
000131 - 11
Figure 2. Complete circuit diagram of the S/PDIF-converter.
10/2000
Elektor Electronics
29
2
(H)PRO
AUD
IO
COMPONENTS LIST
000131-1
R9
S2
4
S1
8
K1
R1
H1
Resistors:
R1 = 8 x 10k
Ω
resistor array
R2 = 10k
Ω
R3,R5 = 270
Ω
R4,R6 = 75
Ω
R7 = 8k
Ω
2
R8 = 4
Ω
7
R9 = 4 x 10k
Ω
resistor array
C6
1
C4
C3
1
C5
TR1
JP2
FSYNC
K3
+5V
C1
R6
SCK
JP1
R5
Capacitors:
C1 = 22µF 40V radial
C2,C3 = 47nF
C4,C6,C7,C8 = 100nF ceramic
C5 = 47µF 25V radial
IC3
/4
R3
R4
/2
IC2
0
/1
C2
K2
C8
MCK
H3
C7
Inductors:
L1 = 47 µH choke
Semiconductors:
IC1 = CS8402A-CP (Crystal)
IC2,IC3 = 74HCT74
IC4 = TOTX173 (Toshiba)
Miscellaneous:
JP1 = 3-way pinheader + jumper
JP2 = 2 x 3-way pinheader + jumper
K1 = 10-way boxheader
K2,K3 = cinch socket, PCB mount (e.g., T-
709G from Monacor/Monarch)
S1 = 8-way DIP switch
S2 = 4-way DIP switch
TR1 = ferrite ring core, Philips type
TN13/7,5/5-3E25, primary 20 turns,
secondary 2 x 2 turns, lacquered wire 0.5
mm dia.
PCB, order code
000131-1
(see Readers
Services pages)
Figure 3. The single-sided PCB designed for the converter. Be sure to fit the three
wire links!
directly to K1 and associated PCB pin.
Depending on the mode, data may be
clocked on the rising or the falling edge of
serial clock SCK. Consequently, an additional
D flip-flop (IC3b) is provided to allow the pos-
sibility of inverting SCK. Jumper J2 selects
the polarity of SCK. To ensure the correct rela-
tionship between data and SCK, the data is
also clocked through a D flip-flop (IC3a). The
divide-by-two MCK clock signal (output Q of
IC2b) is used for this.
The decision to use HCT logic was a con-
scious one because it is possible that the
input signals originate from 3-V logic (such as
the MP3 CD-Player). The CS8402A interprets
signals greater than 2 V as a logic high level.
This arrangement avoids the need for a level
shifter. The L/R clock signal FSYNC (frame
sync) is connected directly, without level
shifting, from K1 to pin 7 of IC1.
SDATA, SCK and FSYNC together form the
audio serial port. Mode select pins M0, M1
and M2 define the format for this port. Seven
different formats may be selected
this way and the addition of Jumper
2 allows several more (refer to the
sidebar for details). A quad DIP
switch S2 and a quad resistor array
R9 are used to select the mode of
these 3 pins. Although the fourth
switch and resistor remain unused,
a quad package is used simply
because it is easier to obtain.
The CS8402A is provided with
eight pins that define the operation
of the transmitter. These are selected
with the aid of S1/R1. Every pin has
two functions depending on whether
professional- or consumer mode is
selected (pin 2, S1-8).
Table 1
lists
the preferred values for use with
OSCAR. The functions shown for S1
apply to consumer mode.
The output of the CS8402A is
symmetrical. The 10 V
pp
drive signal
for Tr1 for the coaxial outputs per-
. The large trans-
former ratio provides a lower output
impedance and greater bandwidth
(better coupling because the primary
winding covers a large part of the
toroidal core).
The application of a transformer
for the coaxial outputs is motivated
as follows: full electrical isolation
between various devices will, to a
large extend, avoid ground loops and
other possible sources of trouble.
A second advantage of the sym-
metrical drive signal for the trans-
former is that by using a toroidal
Ω
30
Elektor Electronics
10/2000
mits a relatively large primary/sec-
ondary turns ratio (10:1). A coaxial
cable (transmission line) is normally
terminated at both ends into its
characteristic impedance. Reflec-
tions are avoided this way. An out-
put signal of 1 V
pp
is required on the
secondary side in order to deliver
0.5 V
pp
into 75
AUD
IO
core, the primary winding can be
split easily into two equal halves.
The terminals for the primary and
secondary windings are now on
opposite sides of the core and the
connection between the two halves
of the primary winding acts as a vir-
tual ground point. This suppresses
crosstalk (and improves electrical
isolation at RF).
Resistors R3 and R5 damp the
outputs of the secondary windings
and ensure that the transformers
present an resistive load to the
CS8402A at all times. R4 and R5
mainly define the output impedance
(75 Ω). Capacitors C2 and C3 provide
RF grounding for the screen of the
coax cables.
The circuitry around the
TOSLINK module IC4 is of a con-
ventional nature and consists
mainly of power supply decoupling.
R7 is required for the internal
adjustment of the module.
winding consists of 20 turns and
the two secondary windings of two
turns each (refer to the drawing of
Figure 4
). A 0.5-metre length of
wire should be adequate.
The connection between the cir-
cuit and the audio data source is
made with a ribbon cable plugged
into K1 (for connection to OSCAR) or
by using the PCB pins next to K1 and
individual wires for other applica-
tions. With OSCAR, the ribbon cable
connects via a 10-way insulation dis-
placement connector (IDC) to pin-
header JP6 (AUX) on the main circuit
board. Pay careful attention to the
correct orientation.
In the case of the MP3 player, the
supply voltage arrives via the ribbon
cable connected to K1. In the event
that the connections are made using
individual wires connected to the
PCB pins next to K1, a separate 5 V
power supply may be connected to
the power supply pins next to IC3.
A few remarks before finishing.
Unfortunately there was no space on
the PCB next to S2 to provide a quick
reference to the function of the indi-
vidual DIP switches. S2-1 is the LSB
M0, S2-2 is M1 and S2-3 is M2.
Between R1 and C1 you may find
enough room on the board to stick a
small label with the default settings
for the functions of S1.
Main settings
on S1 & S2.
Audio Port modes
S2-3
S2-2 S2-1
M2
M1
M0
Format
0 0
0
FSYNC & SCK output
0 0
1
Left/right, 16-24 bits
0 1
0
Word sync, 16-24 bits
0 1
1
Reserved
1 0
0
Left/right, I
2
S compatible
1 0
1
LSB justified, 16 bits
1 1
0
LSB justified, 18 bits
1 1
1
MSB last, 16-24 bits
Sample rates in professional mode
S1-8
S1-4 S1-5
PRO
C6
C7
0 0
0
not defined
0 0
1
48 kHz
0 1
0
44.1 kHz
0 1
1
32 kHz
Sample rates in consumer-mode
S1-8
S1-7 S1-6
PRO
FC1
FC0
1 0
0
44.1 kHz
Practical matters
1 0
1
48 kHz
1 1
0
32 kHz
A small circuit board was developed
for the S/PDIF converter. It is shown
in
Figure 3
. The construction will
require little effort. Winding trans-
former Tr1 is probably the most diffi-
cult part.
The output transformer is wound
with 0.5 mm diameter enamelled
copper wire on a 13?5.5 mm
toroidal core from Philips
(TN13/7.5/5-3E25). The primary
1 1
1
44.1 kHz, CD-mode
Category code
S1-8
S1-2 S1-3
PRO
C8
C9
1 0
0
general format
1 0
1
PCM encoder/decoder
11 0
CD
11 1
DAT
(000131)
Internet address:
Cirrus Logic: http://www.cirrus.com
(‘1’= switch closed, ‘0’=switch open)
Table 1. Default
settings for OSCAR.
S1
Pos.
Signal description
-1 off
C15\
generation status
-2 off
C8\
category code
-3 off
C9\
category code
-4 off
C2\
copy prohibit/permit
-5 on
C3\
pre-emphasis
-6 off
FC0
sample frequency
-7 off
FC1
sample frequency
-8 on
PRO\ professional/consumer
mode
S2-1
on
S2-2
off
S2-3
off
S2-4
n.c.
JP1: /4
Figure 4. Showing how the transformer is wound.
JP2: SCK
10/2000
Elektor Electronics
31
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