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TELEVISION PROTOCOL
STELLA
PROGRAMMER'S
GUIDE
by
Steve Wright
12/03/79
(Reconstructed by Charles Sinnett 6/11/93 Internet: cas@mentor.cc.purdue.edu)
TABLE OF CONTENTS
1
Table of Contents
TELEVISION PROTOCOL ............................................................................................1
Diagram 1 - Atari TV Frame................................................................................2
The TIA (as seen by the programmer) .............................................................................3
1.0 General Description .......................................................................................3
2.0 The Registers .................................................................................................3
3.0 Synchronization .............................................................................................4
3.1 Horizontal Timing..............................................................................4
3.2 Microprocessor Synchronization .......................................................4
3.3 Vertical timing ...................................................................................4
4.0 Color and Luminosity ....................................................................................5
5.0 Playfield .........................................................................................................5
6.0 The Moveable Objects Graphics....................................................................6
6.1 Missile Graphics (M0, M1) ...............................................................6
6.2 Ball Graphics (BL).............................................................................6
6.3 Player Graphics (P0, P1)....................................................................7
7.0 Horizontal Positioning ...................................................................................8
8.0 Horizontal Motion..........................................................................................8
9.0 Object Priorities .............................................................................................9
10.0 Collisions .....................................................................................................10
11.0 Sound ...........................................................................................................10
11.1 Tone .................................................................................................10
11.2 Frequency.........................................................................................10
11.3 Volume.............................................................................................10
12.0 Input Ports....................................................................................................11
12.1 Dumped Input Ports (INPT0 thru INPT3) .......................................11
12.2 Latched Input Ports (INPT4, INPT5)..............................................11
TABLE OF CONTENTS
2
THE PIA (6532)...............................................................................................................12
1.0 General...........................................................................................................12
2.0 Interval timer..................................................................................................12
2.1 Setting the timer.................................................................................12
2.2 Reading the timer...............................................................................12
2.3 When the timer reaches zero..............................................................12
3.0 RAM ..............................................................................................................13
4.0 The I/O ports ..................................................................................................13
4.1 Port B - Console Switches (read only)...............................................13
5.0 Port A - Hand Controllers ..............................................................................13
5.1 Setting for input or output..................................................................13
5.2 Inputting and Outputting....................................................................14
5.3 Joystick Controllers ...........................................................................14
5.4 Paddle (pot) controllers......................................................................14
5.5 Keyboard controllers..........................................................................15
6.0 Address summary table..................................................................................15
PAL/SECAM CONVERSIONS ......................................................................................16
PAL ......................................................................................................................16
SECAM................................................................................................................16
TIA 1A - TELEVISION INTERFACE ADAPTOR (MODEL 1A) ................................17
GENERAL DESCRIPTION ................................................................................17
DETAILED DESCRIPTION ...............................................................................18
1. Data and addressing .........................................................................................18
2. Synchronization ...............................................................................................18
A. Horizontal Timing...............................................................................18
B. Vertical Timing ...................................................................................18
C. Composite Sync...................................................................................18
D. Microprocessor Synchronization ........................................................19
3. Playfield graphics Register ..............................................................................19
A. Description ..........................................................................................19
B. Normal Serial Output ..........................................................................19
C. Reflected Serial Output .......................................................................19
D. Timing Constraints..............................................................................20
4. Horizontal Position Counters...........................................................................20
A. Description ..........................................................................................20
B. Ball position Counter ..........................................................................20
C. Player Position Counters .....................................................................20
D. Missile Position Counters ...................................................................21
5. Horizontal Motion Registers............................................................................21
A. General Description ............................................................................21
B. Timing constraints...............................................................................21
TABLE OF CONTENTS
3
6. Moving Object Graphics Registers ..................................................................22
A. General Description ............................................................................22
B. Missile Graphics..................................................................................22
C. Player Graphics ...................................................................................22
D. Vertical Delay .....................................................................................23
E. Ball Graphics .......................................................................................24
7. Collision Detection Latches .............................................................................24
A. Definitions...........................................................................................24
B. Reading Collision...............................................................................24
C. Reset ....................................................................................................24
8. Input ports ........................................................................................................25
A. General Description ............................................................................25
B. Dumped Input Ports (I0 through I3) ...................................................25
C. Latched Input ports (I4, I5)..................................................................25
8.5 Priority Encoder .............................................................................................26
A. Purpose................................................................................................26
B. Priority Assignment.............................................................................26
C. Priority Control ...................................................................................26
9 Color Luminance Registers...............................................................................27
A. Description ..........................................................................................27
B. Multiplexing........................................................................................27
10. Color Phase Shifter ........................................................................................27
11. Audio Circuits................................................................................................27
A. Frequency Select .................................................................................27
B. Noise-Tone Generator .........................................................................28
C. Volume Select .....................................................................................28
TABLE OF CONTENTS
4
Figure 1. Vertical Delay.......................................................................................29
Figure 2. Synchronization ....................................................................................30
Figure 3. Color-Luminance..................................................................................30
Figure 4. Typical Horizontal Motion Circuit .......................................................31
Figure 5. Playfield Graphics ................................................................................32
Figure 6. Collision Detection...............................................................................33
Figure 7. Audio Circuit ........................................................................................34
Figure 8. Input Ports ............................................................................................35
Figure 9. Game System ........................................................................................36
Write Address Detailed Functions ...................................................................................37
WSYNC (wait for sync).......................................................................................37
RSYNC (reset sync).............................................................................................37
VSYNC ................................................................................................................37
VBLANK .............................................................................................................37
PJ0 (PF1, PF2) .....................................................................................................38
PLAYFIELD REGISTERS SERIAL OUTPUT ..................................................38
CTRLPF...............................................................................................................38
NUSIZ0 (NUSIZ1)...............................................................................................39
RESP0 (RESP1, RESM0, RESM1, RESBL) ......................................................39
RESMP0 (RESMP1) ...........................................................................................39
HMOVE...............................................................................................................40
HMCLR ...............................................................................................................40
HMP0 (HMP1, HMM0, HMM1, HMBL) ...........................................................40
ENAM0 (ENAM1, ENABL) ...............................................................................41
GRP0 (GRP1) ......................................................................................................41
REFP0 (REFP1)...................................................................................................41
VDELP0 (VDELP1, VDELBL)...........................................................................41
CXCLR ................................................................................................................41
COLUP0 (COLUP1, COLUPF, COLUBK) ........................................................42
AUDF0 (AUDF1) ................................................................................................42
AUDC0 (AUDC1) ...............................................................................................43
AUDV0 (AUDV1)...............................................................................................43
WRITE ADDRESS SUMMARY ........................................................................44
READ ADDRESS SUMMARY..........................................................................45
TIA O0..02 AND LUM TIMING ........................................................................46
TIA WRITE TIMING CHARACTERISTICS.....................................................47
TIA READ TIMING CHARACTERISTICS ......................................................48
TIA COMP-SYN AND READY TIMING..........................................................49
RSYNC, RES0O, H01, H02, SHB, 02, 0O .........................................................50
TIA RSYNC AND BLANK AND READY TIMING.........................................51
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