Getting started with STM32F10xxx hardware development.pdf

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Getting started with STM32F10xxx hardware development
AN2586
Application note
Getting started with STM32F10xxx hardware development
Introduction
This application note is intended for system designers who require a hardware
implementation overview of the development board features such as the power supply, the
clock management, the reset control, the boot mode settings and the debug management. It
shows how to use the low-density value line, low-density, medium-density value line,
medium-density, high-density and connectivity line STM32F10xxx product families and
describes the minimum hardware resources required to develop an STM32F10xxx
application.
Detailed reference design schematics are also contained in this document with descriptions
of the main components, interfaces and modes.
Glossary
●
Low-density value line devices are STM32F100xx microcontrollers where the Flash
memory density ranges between 16 and 32 Kbytes.
●
Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx
microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes.
●
Medium-density value line devices are STM32F100xx microcontrollers where the
Flash memory density ranges between 64 and 128 Kbytes.
●
Medium-density devices are STM32F100xx, STM32F101xx, STM32F102xx and
STM32F103xx microcontrollers where the Flash memory density ranges between 64
and 128 Kbytes.
●
High-density value line devices are STM32F100xx microcontrollers where the Flash
memory density ranges between 256 and 512 Kbytes.
●
High-density devices are STM32F101xx and STM32F103xx microcontrollers where
the Flash memory density ranges between 256 and 512 Kbytes.
●
Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers.
April 2011
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Contents
AN2586
Contents
1
Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1.1
Independent A/D converter supply and reference voltage . . . . . . . . . . . . 6
1.1.2
Battery backup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1.3
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.2
Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3
Reset and power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.3.1
Power on reset (POR) / power down reset (PDR) . . . . . . . . . . . . . . . . . . 8
1.3.2
Programmable voltage detector (PVD) . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.3
System reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2
Clocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1
HSE OSC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.1.1
External source (HSE bypass) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.1.2
External crystal/ceramic resonator (HSE crystal) . . . . . . . . . . . . . . . . . 12
2.2
LSE OSC clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.1
External source (LSE bypass) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.2
External crystal/ceramic resonator (LSE crystal) . . . . . . . . . . . . . . . . . . 13
2.3
Clock security system (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3
Boot configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
Boot mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2
Boot pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3
Embedded boot loader mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4
Debug management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2
SWJ debug port (serial wire and JTAG) . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3
Pinout and debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3.1
SWJ debug port pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.3.2
Flexible SWJ-DP pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3.3
Internal pull-up and pull-down resistors on JTAG pins . . . . . . . . . . . . . . 19
4.3.4
SWJ debug port connection with standard JTAG connector . . . . . . . . . 19
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AN2586
Contents
5
Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1
Printed circuit board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2
Component position . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3
Ground and power supply (V S S , V DD ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.4
Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.5
Other signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.6
Unused I/Os and features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6
Reference design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1.1
Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1.2
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1.3
Boot mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1.4
SWJ interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1.5
Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.2
Component references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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List of tables
AN2586
List of tables
Table 1.
Boot modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 2.
Debug port pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 3.
SWJ I/O pin availability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4.
Mandatory components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 5.
Optional components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 6.
Reference connection for all packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 7.
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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List of figures
List of figures
Figure 13. Typical layout for V DD /V SS pair . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
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