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Differential Bus Transceivers
SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B – JULY 1985 – REVISED JUNE 1999
Bidirectional Transceivers
D OR P PACKAGE
(TOP VIEW)
Meet or Exceed the Requirements of ANSI
Standards TIA/EIA-422-B and TIA/EIA-485-A
and ITU Recommendations V.11 and X.27
R
RE
DE
D
1
2
3
4
8
7
6
5
V CC
B
A
GND
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
3-State Driver and Receiver Outputs
Individual Driver and Receiver Enables
Wide Positive and Negative Input/Output
Bus Voltage Ranges
Driver Output Capability...
±
60 mA Max
Thermal Shutdown Protection
Driver Positive and Negative Current
Limiting
Receiver Input Impedance...12 k
W
Min
200 mV
Receiver Input Hysteresis...50 mV Typ
Operate From Single 5-V Supply
±
description
The SN65176B and SN75176B differential bus transceivers are monolithic integrated circuits designed for
bidirectional data communication on multipoint bus transmission lines. They are designed for balanced
transmission lines and meet ANSI Standards TIA/EIA-422-B and TIA/EIA-485-A and ITU Recommendations
V.11 and X.27.
The SN65176B and SN75176B combine a 3-state differential line driver and a differential input line receiver,
both of which operate from a single 5-V power supply. The driver and receiver have active-high and active-low
enables, respectively, that can be connected together externally to function as a direction control. The driver
differential outputs and the receiver differential inputs are connected internally to form differential input/output
(I/O) bus ports that are designed to offer minimum loading to the bus when the driver is disabled or V CC = 0.
These ports feature wide positive and negative common-mode voltage ranges, making the device suitable for
party-line applications.
The driver is designed for up to 60 mA of sink or source current. The driver features positive and negative current
limiting and thermal shutdown for protection from line-fault conditions. Thermal shutdown is designed to occur
at a junction temperature of approximately 150
C. The receiver features a minimum input impedance of 12 k
W
,
an input sensitivity of
±
200 mV, and a typical input hysteresis of 50 mV.
The SN65176B and SN75176B can be used in transmission-line applications employing the SN75172 and
SN75174 quadruple differential line drivers and SN75173 and SN75175 quadruple differential line receivers.
The SN65176B is characterized for operation from – 40
°
C to 105
°
C and the SN75176B is characterized for
operation from 0
°
C to 70
°
C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright W 1999, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1
Receiver Input Sensitivity...
°
•
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SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B – JULY 1985 – REVISED JUNE 1999
Function Tables
DRIVER
INPUT
ENABLE
OUTPUTS
D
DE
A
B
H
H
H
L
L
H
L
H
X
L
Z
Z
RECEIVER
DIFFERENTIAL INPUTS
EN AB LE
OUTPUT
A–B
RE
R
V ID
.
0.2 V
L
H
– 0.2 V < V ID < 0.2 V
L
?
V ID
3
– 0.2 V
L
L
X
H
Z
Open
L
?
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic symbol †
logic diagram (positive logic)
3
DE
3
DE
EN1
4
2
RE
EN2
D
RE
2
6
6
7
4
1
A
A
1
D
7
R
Bus
1
B
B
R
1
2
† This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
199641953.001.png
SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B – JULY 1985 – REVISED JUNE 1999
schematics of inputs and outputs
EQUIVALENT OF EACH INPUT
TYPICAL OF A AND B I/O PORTS
TYPICAL OF RECEIVER OUTPUT
V CC
V CC
V CC
85 W
NOM
R (eq)
16.8 k W
NOM
W
NOM
Input
W
NOM
Output
GND
Driver input: R (eq) = 3 k W NOM
Enable inputs: R (eq )= 8 k W NOM
R (eq) = equivalent resistor
Input/Output
Port
absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †
Supply voltage, V CC (see Note 1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 V
Voltage range at any bus terminal
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
– 10 V to 15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
5.5 V
q JA (see Note 2): D package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
197
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
P package
104
°
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
260
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input/output bus voltage, are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65
°
C to 150
°
C
recommended operating conditions
MIN
TYP MAX UNIT
Supply voltage, V CC
4.75
5
5.25
V
12
Voltage at any bus terminal (separately or common mode), V I or V IC
V
V
–7
High-level input voltage, V IH
D, DE, and RE
2
V
Low-level input voltage, V IL
D, DE, and RE
0.8
V
Differential input voltage, V ID (see Note 3)
±
12
V
High-level output current, I OH
Driver
–60
mA
Receiver
– 400
m A
Low-level output current, I OL
Driver
60
mA
mA
Receiver
8
SN65176B
–40
105
Operating free-air temperature, T A
° C
°
C
SN75176B
0
70
NOTE 3: Differential-input/output bus voltage is measured at the noninverting terminal A with respect to the inverting terminal B.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
960
960
Enable input voltage, V I
Storage temperature range, T stg
Voltage at any bus terminal (separately or common mode) V I or V IC
High level output current I OH
Low level output current I OL
Operating free air temperature T A
199641953.002.png 199641953.003.png
SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B – JULY 1985 – REVISED JUNE 1999
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS †
MIN
TYP ‡ MAX UNIT
V IK
Input clamp voltage
I I = – 18 mA
– 1.5
V
V O
Output voltage
I O = 0
0
6
V
|V OD1 |
Differential output voltage
I O = 0
1.5
3.6
6
V
|V OD2 |
Differential output voltage
R L = 100 W,
See Figure 1
1/2 V OD1
or 2
V
OD2
R L = 54 W,
See Figure 1
1.5
2.5
5
V
V OD3
Differential output voltage
See Note 4
1.5
5
V
D |V OD |
Change in magnitude of differential output
± 0.2
V
D |V OD |
voltage §
g
g
V
V OC
Common mode output voltage
R L = 54 W or 100 W , See Figure 1
See Figure 1
+3
V
V OC
V
–1
D |V OC |
Change in magnitude of common-mode
± 0.2
V
D |V OC |
g g
output voltage §
V
Output current
Output disabled,
V O = 12 V
1
I O
mA
,
mA
See Note 5
V O = – 7 V
– 0.8
I IH
High-level input current
V I = 2.4 V
20
m A
I IL
Low-level input current
V I = 0.4 V
– 400
m
A
V O = – 7 V
– 250
V O = 0
150
I OS
Short circuit output current
mA
mA
V O = V CC
250
V O = 12 V
250
Supply current (total package)
No load
Outputs enabled
42
70
I CC
No load
mA
mA
Outputs disabled
26
35
† The power-off measurement in ANSI Standard TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs.
‡ All typical values are at V CC = 5 V and T A = 25
°
C.
§
D
|V OD | and
D
|V OC | are the changes in magnitude of V OD and V OC , respectively, that occur when the input is changed from a high level to a low
level.
The minimum V OD2 with a 100-
load is either 1/2 V OD1 or 2 V, whichever is greater.
NOTES: 4. See ANSI Standard TIA/EIA-485-A, Figure 3.5, Test Termination Measurement 2.
5. This applies for both power on and off; refer to ANSI Standard TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does
not apply for a combined driver and receiver terminal.
W
switching characteristics, V CC = 5 V, R L = 110 k
W
, T A = 25
C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
t d(OD) Differential-output delay time
R L = 54
,
See Figure 3
15
22
ns
R L =54
W
See Figure 3
W
t t(OD)
Differential-output transition time
20
30
ns
t PZH
Output enable time to high level
See Figure 4
85
120
ns
t PZL
Output enable time to low level
See Figure 5
40
60
ns
t PHZ
Output disable time from high level
See Figure 4
150
250
ns
t PLZ
Output disable time from low level
See Figure 5
20
30
ns
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
± 02
Common-mode output voltage
R L =54 W or 100 W
± 02
Output current
I O
Short-circuit output current
I OS
Supply current (total package)
I CC
°
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SN65176B, SN75176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS101B – JULY 1985 – REVISED JUNE 1999
SYMBOL EQUIVALENTS
DATA-SHEET PARAMETER
TIA/EIA-422-B
TIA/EIA-485-A
V O
V oa, V ob
V oa, V ob
|V OD1 |
V o
V o
|V OD2 |
V t (R L = 100 W )
V t (R L = 54 W )
|V OD3 |
V t (Test Termination
t (
Measurement 2)
D |V OD |
||V| – |V t ||
||V t – |V t ||
V OC
|V o s |
|V o s |
D
|V OC |
|V os – V os |
|V os – V os |
I OS
|I sa |, |I sb |
I O
|I xa |, |I xb |
I ia , I ib
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP † MAX UNIT
V IT +
Positive-going input threshold voltage
V O = 2.7 V,
I O = – 0.4 mA
0.2
V
V IT –
Negative-going input threshold voltage
V O = 0.5 V,
I O = 8 mA
– 0.2 ‡
V
V hys
Input hysteresis voltage (V IT + – V IT – )
50
mV
V IK
Enable Input clamp voltage
I I = – 18 mA
– 1.5
V
V OH
High level output voltage
V ID = 200 mV,
I OH = – 400
m
A,
2.7
V
V OH
See Figure 2
,
OH
m
,
V
V OL
Low level output voltage
V ID = – 200 mV,
I OL = 8 mA,
0.45
V
See Figure 2
,
OL
,
V
I OZ
High-impedance-state output current
V O = 0.4 V to 2.4 V
± 20
m A
I I
Line input current
Other input = 0 V,
V I = 12 V
1
mA
I I
,
mA
See Note 6
V I = – 7 V
– 0.8
I IH
High-level enable input current
V IH = 2.7 V
20
m A
I IL
Low-level enable input current
V IL = 0.4 V
– 100
m A
r I
Input resistance
V I = 12 V
12
k
W
I OS
Short-circuit output current
–15
–85
mA
Outputs enabled
42
55
I CC
Supply current (total package)
No load
mA
I CC
mA
Outputs disabled
26
35
† All typical values are at V CC = 5 V, T A = 25 ° C.
‡ The algebraic convention, in which the less positive (more negative) limit is designated minimum, is used in this data sheet for common-mode
input voltage and threshold voltage levels only.
NOTE 6: This applies for both power on and power off. Refer to EIA Standard TIA/EIA-485-A for exact conditions.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
5
|V OD3 |
High-level output voltage
27
ID
Low-level output voltage
045
V OL
ID
Line input current
Supply current (total package)
No load
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